Introduction to Analog Design
On-Line Class
CET – Central European Time Zone
Download One-Page Schedule Here
May 19-23, 2025Registration deadline: May 7, 2025 |
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TEACHING HOURS
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| DAILY | Central European Time CET | Eastern Standard Time EST | Pacific Standard Time PST | India Standard Time IST |
| Module 1 | 3:00-4:30 pm | 9:00-10:30 am | 6:00-7:30 am | 7:30-9:00 pm |
| Module 2 | 5:00-6:30 pm | 11:00-12:30 am | 8:00-9:30 am | 9:30-11:00 pm |
Modules all taught by Klaas Bult, Analog Design Consult, The Netherlands
Monday, May 19
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| 3:00-4:30 pm | How to make Gain?: Introduction, MOS-Transistor, Common-Source Amplifiers, Cascoding | |||
| 5:00-6:30 pm | Gain-Boosting: Gain-Boosting Principle, HW1 Explanation | |||
Tuesday, May 20
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| 3:00-4:30 pm | Noise: Noise, Basic Properties, Noise in Circuit Design | |||
| 5:00-6:30 pm | Distortion: Basic Calculation, Distortion and Feedback, HW2 Explanation | |||
Wednesday, May 21
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| 3:00-4:30 pm | Basic Sub-Circuits: Common-Source, Common Drain, Common Gate, Differential Pair, Current Mirrors, Biasing | |||
| 5:00-6:30 pm | OpAmp Architectures: Architectures 1, 2 and 3, Folded Cascode, Telescopic, HW3 Explanation | |||
Thursday, May 22
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| 3:00-6:30 pm | Two-Stage Design: Need for Compensation, Ideal Impedance, Miller Compensation, Pole Splitting, Nulling-R, Design Aspects, HW4 Explanation | |||
Friday, May 23
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| 3:00-6:30 pm | Class-AB Output Stages: Need for Class-AB, Class-A / Class-AB / Class B, Examples Class AB, Design Example | |||
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Abstracts
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Introduction to Analog Design |
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How to make Gain?: Introduction, MOS-Transistor, Common-Source Amplifiers, Cascoding Abstract. |
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Gain-Boosting: Gain-Boosting Principle Abstract. |
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Noise: Noise, Basic Properties, Noise in Circuit Design Abstract. |
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Distortion: Basic Calculation, Distortion and Feedback Abstract. |
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Basic Sub-Circuits: Common-Source, Common Drain, Common Gate, Differential Pair, Current Mirrors, Biasing Abstract. |
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OpAmp Architectures: Architectures 1, 2 and 3, Folded Cascode, Telescopic Abstract. |
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Two-Stage Design: Need for Compensation, Ideal Impedance, Miller Compensation, Pole Splitting, Nulling-R, Design Aspects Abstract. |
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Class-AB Output Stages: Need for Class-AB, Class-A / Class-AB / Class B, Examples Class AB, Design Example Abstract. |
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