Introduction to Analog Design
On-Line Class
CET – Central European Time Zone
Download One-Page Schedule Here
May 19-23, 2025Registration deadline: May 7, 2025 |
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TEACHING HOURS
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| DAILY | Central European Time CET | Eastern Standard Time EST | Pacific Standard Time PST | India Standard Time IST |
| Module 1 | 3:00-4:30 pm | 9:00-10:30 am | 6:00-7:30 am | 7:30-9:00 pm |
| Module 2 | 5:00-6:30 pm | 11:00-12:30 am | 8:00-9:30 am | 9:30-11:00 pm |
Modules all taught by Klaas Bult, Analog Design Consult, The Netherlands
Monday, May 19
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| 3:00-4:30 pm | How to make Gain?: Introduction, MOS-Transistor, Common-Source Amplifiers, Cascoding | |||
| 5:00-6:30 pm | Gain-Boosting: Gain-Boosting Principle, HW1 Explanation | |||
Tuesday, May 20
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| 3:00-4:30 pm | Noise: Noise, Basic Properties, Noise in Circuit Design | |||
| 5:00-6:30 pm | Distortion: Basic Calculation, Distortion and Feedback, HW2 Explanation | |||
Wednesday, May 21
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| 3:00-4:30 pm | Basic Sub-Circuits: Common-Source, Common Drain, Common Gate, Differential Pair, Current Mirrors, Biasing | |||
| 5:00-6:30 pm | OpAmp Architectures: Architectures 1, 2 and 3, Folded Cascode, Telescopic, HW3 Explanation | |||
Thursday, May 22
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| 3:00-6:30 pm | Two-Stage Design: Need for Compensation, Ideal Impedance, Miller Compensation, Pole Splitting, Nulling-R, Design Aspects, HW4 Explanation | |||
Friday, May 23
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| 3:00-6:30 pm | Class-AB Output Stages: Need for Class-AB, Class-A / Class-AB / Class B, Examples Class AB, Design Example | |||
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Abstracts
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Introduction to Analog Design |
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Course Overview |
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This course is aimed at engineers with some background in Electrical Engineering, who wish to know more about analog CMOS design. Some familiarity with SPICE simulations and some basic knowledge about feedback theory is assumed. The course will use the ubiquitous OpAmp as a design vehicle, to give some focus on the design, starts with an explanation of the MOS transistor and ends with Folded-Cascode and 2-Stage amplifiers. It deals with all aspects of analog design, including amplifier architectures, noise, distortion, frequency behavior & stability and settling behavior. |
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| The OpAmp
What is an OpAmp? How do you use an OpAmp? Explanation of the MOS transistor. Various modes of operation. Derivation of the device current. Equivalent visual model based on water. Some second order effects. |
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| How to make Gain?
Introduction of the Common-Source amplifier. Detailed description of how gain comes about. DC, AC and Transient behavior. Device optimization for Settling Behavior. Main limitations of the Common-Source stage in terms of frequency behavior and Gain. Introduction of the Process-Line. |
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| How to make more Gain?
Introduction of the Cascode-Stage. Effects on DC, AC and Transient behavior. Limitations of the Cascode Stage. Device Transit-Frequency Ft. Cascode Process-Line. Mobility Reduction. Velocity Saturation. |
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| How to make even more Gain?
Gain-Boosting introduction. Repetitive Gain-Boosting. Effect on Process-Line. High-Frequency Behavior. |
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| Optimizing Setlling Behavior
Gain-Boosting Settling Behavior. Doublets. How to Judge Settling Behavior. Optimizing Gain-Boosting Settling Behavior. |
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| Judging Setlling Behavior
Why is it not straightforward to judge settling behavior? Introduction of the Settling Plot. What can we learn from the Settling Plot? |
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| Noise
Introduction to Noise in Circuits. Probability. Standard Deviation. Spectrum. Basic properties. kT/C-noise. MOSFET-noise. 1/f-noise. Knee-frequency and Ft. How to calculate noise of a circuit? Noise Integration and Signal to Noise Ratio (SNR). |
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| Noise in Circuit Design
Noise of Common-Source Amplifier. Noise and Layout. Noise optimization. Noise Power Excess. Noise of the Cascode Transistor. |
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