August 30 – September 3, 2027

Registration deadline: July 28, 2027
Payment deadline: August 18, 2027

Download one-page schedule here

Course material will be distributed only if fees have been paid by the deadline for payment.

MONDAY, August 30

TUESDAY, August 31

WEDNESDAY, September 1

THURSDAY, September 2

FRIDAY, September 3

Advanced Analog Circuit Design
August 31 – September 3, 202
EPFL Premises, Lausanne, Switzerland

Analog Computing is Dead. Long Live analog Computing
Boris Murmann, University of Hawaï, Hawaï

In modern electronic systems, analog circuits are primarily used to condition and discretize physical signals, while most of the information processing occurs in the digital domain. The digital abstraction has allowed us to focus on bits as atomic carriers of information, largely ignore analog nuances in the underlying physical signals, and hence scale hierarchical systems toward transistor counts of over 100 billion on a single chip. While this approach has been a key enabler for managing complexity, it has always been scrutinized for its potential inefficiencies. Why don’t we prefer to perform an addition by simply connecting two wires carrying analog currents? Similarly, why not compute an integral by collecting charges on a capacitor? This talk will provide some answers to these questions, with a focus on AI/ML computing systems.

When Will Analog Circuit Design Automation Have
Its ChatGPT Moment
Boris Murmann, University of Hawaï, Hawaï

Analog, RF and mixed-signal chip design has been stubbornly slow and largely manual for many decades. Although a large number of tools for full or partial automation have been developed, there has been limited adoption due to a wide range of issues related to the unstructured and intricate nature of analog design. Will this situation change given the current trajectories and success of AI-driven automation? This presentation will investigate this question based on the experience and perspectives of an analog designer. It will focus on identifying the main showstoppers that must be understood and addressed before AI-driven analog design can thrive.

CMOS Switched-Capacitor Circuit Design
Christian Enz, EPFL, Switzerland

Discrete-time signals, Laplace and z-transform; Basic building blocks (opamps, switches, capacitors); Sample-and-hold circuits; SC integrators, bilinear filters and and biquads; SC amplifiers; Correlated double sampling and chopper stabilization; Nonideal effects and their correction.

Stability of Operational Amplifiers
Kofi Makinwa, TU Delft, The Netherlands

Two-stage operational amplifiers in unity-gain configuration, suffer from peaking unless a compensation capacitance is added, or the current is increased in the second stage. These stability conditions are examined in detail, followed by five techniques to eliminate the positive zero. One of them is feedforward, which allows a gain of over a factor of two in power efficiency. The design plans are extended to three-stage amplifiers, which offer new stabilization opportunities.

Noise
Kofi Makinwa, TU Delft, The Netherlands

Abstract.

Offset and CMRR Limitations
Kofi Makinwa, TU Delft, The Netherlands

Abstract.

Offset and 1/f Noise Reduction Techniques
Kofi Makinwa, TU Delft, The Netherlands

The design of precision analog interfaces in CMOS is severely impaired by offset, offset drift and 1/f noise. The material covered in this module analyzes these impairments in detail and reviews the common solutions for their remedy: chopping, autozeroing, correlated double sampling and offset stabilization. We will discuss the residual nonidealities as well as pros and cons of each technique and review typical application examples. In addition, we will survey recent advances in the state-of-the-art.

Time Assisted Analog Design
Pavan Hanumolu, University of Illinois, USA

Time-based signal processing is emerging as a viable alternative to analog signal processing traditionally performed in voltage, current, or charge domains. This tutorial discusses time-based techniques to implement classical analog functions such as filtering, control and data conversion. Time-based circuits using voltage controlled ring oscillators will be presented and their design tradeoffs will be elucidated with the aid of circuit design examples.

Digital Calibration for Analog Circuits
Ian Galton, UC San Diego, USA

CMOS scaling has reduced voltage headroom, intrinsic device gain, and device matching, causing analog design challenges, but it has also enabled dense, fast, and power-efficient digital circuitry. This lecture explores how digital calibration can turn this tradeoff into an advantage. First, dynamic element matching is presented, which modulates the usage pattern of nominally identical or ratioed components to convert static mismatch errors into noise that is uncorrelated with the signal and often shaped out of the signal band. Next, several correlation-based techniques are covered, each of which continuously measures and cancels component mismatch error, gain error, or nonlinear distortion. Every technique is explained in the context of a data converter or fractional-N phase-locked loop example.

Bandgap Voltage References
Vadim Ivanov, Texas Instruments, USA

Discussed are error sources of the bandgap voltage references and techniques for improving their accuracy: circuit techniques for low-noise bandgap generation core, feedback amplifier with chopping offset elimination, output buffer with mOhm output impedance and fast settling on load changes; single- dual and triple temperature trimming; packaging requirements; testing and application particulars. Also presented circuit solutions for reverse bandgap reference, operational from 0.9V supply, and reference structure and implementations with nanoampere consumption.

Techniques for OpAmp Speed and Accuracy Improvement
Vadim Ivanov, Texas Instruments, USA

Presented is a top down design process of the OpAmps based on the structural design methodology. We will start from selection of the gain structure, followed by the implementations of gain structures as well as gradual addition of various specific functions like PSRR/CMRR improvement, slew enhancement, overload recovery. We will consider offset improvement by trimming as well as by auto-zeroing and chopping, high-and low-voltage design specifics. Most of the circuits solutions were not published before and have been used in recent industrial ICs. Yet it is not another cookbook with analog circuit recipes. The goal of this presentation is to arm the engineers with a tool helping to invent the solution for any analog design problem and, at the same time, be reasonably sure that this solution is one of the best possible for any given process and set of constraints.

Gain Boosting & How to Judge OpAmp Settling Behaviour
Klaas Bult, Analog Design Consult, The Netherlands

Gain-Boosting is a means to enhance the gain of single-stage amplifiers beyond any limit, without degrading the amplifiers speed in terms of GBW or settling behaviour. This lecture discusses how to design a gain-boosting amplifier for optimal settling behaviour and also details the perfect way to judge OpAmp settling behaviour, showing any (start of) ringing (even at the lowest level) or slow settling components, applicable to any type of amplifier.

Design Mistakes You’d Rather Not Talk About
Klaas Bult, Analog Design Consult, The Netherlands

Every designer makes mistakes and mistakes are not the things we are proudest of, but they are the events that we learn from most. Unfortunately, they almost never get published as only succeses are accepted in Journals and Conferences. This lecture is talking about mistakes I’ve made – and learned from a lot, the hard way.

Delta Sigma Data Converters
Shanthi Pavan, Shanthi Pavan, Indian Institute of Technology, India

Abstract.