Advanced Analog Circuit Design
On-Line Class
CET – Central European Time Zone
Download One-Page Schedule Here
Week 1: October 10-14, 2022Week 2: October 17-21, 2022Registration deadline: September 21, 2022 |
TEACHING HOURS
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DAILY | Central European Time CET | Eastern Standard Time EST | Pacific Standard Time PST | India Standard Time IST |
Module 1 | 3:00-4:30 pm | 9:00-10:30 am | 6:00-7:30 am | 6:30-8:00 pm |
Module 2 | 5:00-6:30 pm | 11:00 am – 12:30 pm | 8:00-9:30 am | 8:30-10:00 pm |
WEEK 1: October 10-14
Monday, October 10
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3:00-4:30 pm | Analog Building Blocks | Willy Sansen |
5:00-6:30 pm | Stability of Feedback Amplifiers | Willy Sansen |
Tuesday, October 11
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3:00-4:30 pm | Power Optimization | Willy Sansen |
5:00-6:30 pm | Fully Differential Amplifiers | Willy Sansen |
Wednesday, October 12
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3:00-4:30 pm | Distortion in Elementary Transistor Circuits | Willy Sansen |
5:00-6:30 pm | Distortion Cancellation | Willy Sansen |
Thursday, October 13
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3:00-6:30 pm | Continuous-Time Filters | Christian Enz |
Friday, October 14
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3:00-6:30 pm | CMOS Switched-Capacitor Circuit Design | Chrisitan Enz |
WEEK 2: October 17-21
Abstracts
Advanced Analog Circuit Design |
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Analog Building Blocks Analog integrated circuits consist of building blocks with one single or two transistors. The gain, input- and output impedance is analyzed of the three single-transistor stages i.e. the amplifier, the source follower and the cascode. The differential pairs, current source and inverter amplifiers are the most used two-transistor configurations. They are analyzed in detailed. Negative resistors are added for higher Gain and Gain-Bandwidth. Design procedures are discussed for all of them. |
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Stability of Feedback Amplifiers Two-stage operational amplifiers in unity-gain configuration, suffer from peaking unless a compensation capacitance is added, or the current is increased in the second stage. These stability conditions are examined in detail, followed by five techniques to eliminate the positive zero. One of them is feedforward, which allows a gain of over a factor of two in power efficiency. The design plans are extended to three-stage amplifiers, which offer new stabilization opportunities. |
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Power Optimization For minimum power consumption, two transistor parameters have to be chosen with great attention for speed and noise. They are the inversion coefficient or current density and the increased channel length. This is elaborated on by use of the full MOST model, including weak and strong inversion and velocity saturation. Designs plans and examples are given for single-, two- and three-stage amplifiers. |
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Fully Differential Amplifiers The most used operational amplifiers are the symmetrical amplifier, the folded-cascode and the Miller OTA amplifier. All three of them are optimized and compared with respect to power consumption, high-speed capability and noise. Negative resistors are included as well. Fully-differential amplifiers necessitate an additional common-mode feedback amplifier. Three of the most often-used common-feedback amplifiers are optimized and compared. Switched-capacitor common-mode feedback is included as well. |
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Distortion in Elementary Transistor Circuits In telecommunication applications, distortion has become important as it mixes the channel contents. Firstly the several parameters are derived to described distortion such as IM3, -1dB compression point , IMFDR3, etc. Then several sources of non-linear distortion are identified and analyzed for a MOST in all three regions of operation. Many numerical examples are included. Techniques for the reduction of distortion are discussed, such as differential operation and feedback. Finally distortion is analyzed for two-stage operational amplifiers. |
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Distortion Cancellation The application of feedback is not sufficient for ultra-low-distortion. Distortion cancellation techniques are introduced such as cross-coupling, paralleling, etc. The Quality of cancellation is investigated and compared for both static and dynamic ampliers. Circuits for simultaneous noise and distortion cancellations are included as well. |
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Continuous-Time Filters Continuous-time filters play an important role in many communication systems and at the data conversion interface, where they are required for anti-aliasing and reconstruction. This module begins by reviewing the basic s-domain filter approximations and then looks into implementations strategies. We review active RC and gm-C topologies and study their imperfections and sensitivities to nonideal effects. |
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CMOS Switched-Capacitor Circuit Design Discrete-time signals, Laplace and z-transform; Basic building blocks (opamps, switches, capacitors); Sample-and-hold circuits; SC integrators, bilinear filters and and biquads; SC amplifiers; Correlated double sampling and chopper stabilization; Nonideal effects and their correction. |
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Offset and 1/f Noise Reduction Techniques The design of precision analog interfaces in CMOS is severely impaired by offset, offset drift and 1/f noise. The material covered in this module analyzes these impairments in detail and reviews the common solutions for their remedy: chopping, autozeroing, correlated double sampling and offset stabilization. We will discuss the residual nonidealities as well as pros and cons of each technique and review typical application examples. In addition, we will survey recent advances in the state-of-the-art. |
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Time Assisted Analog Design Time-based signal processing is emerging as a viable alternative to analog signal processing traditionally performed in voltage, current, or charge domains. This tutorial discusses time-based techniques to implement classical analog functions such as filtering, control and data conversion. Time-based circuits using voltage controlled ring oscillators will be presented and their design tradeoffs will be elucidated with the aid of circuit design examples. |
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Non-Linearities in Analog and Mixed-Signal Circuits Abstract. |
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Practical Techniques of Frequency Compensation Every analog IC comprises multiple feedback loops. Interaction between these loops makes frequency compensation of such system non-trivial task, unsupported by the general control theory. Every MOS or bipolar transistor is nonlinear, which may cause conditional stability and complicate compensation. |
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Bandgap Voltage References Discussed are error sources of the bandgap voltage references and techniques for improving their accuracy: circuit techniques for low-noise bandgap generation core, feedback amplifier with chopping offset elimination, output buffer with mOhm output impedance and fast settling on load changes; single- dual and triple temperature trimming; packaging requirements; testing and application particulars. Also presented circuit solutions for reverse bandgap reference, operational from 0.9V supply, and reference structure and implementations with nanoampere consumption. |
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Circuit Techniques for OpAmp Speed and Accuracy Improvement Presented is a top down design process of the OpAmps based on the structural design methodology. We will start from selection of the gain structure, followed by the implementations of gain structures as well as gradual addition of various specific functions like PSRR/CMRR improvement, slew enhancement, overload recovery. We will consider offset improvement by trimming as well as by auto-zeroing and chopping, high-and low-voltage design specifics. Most of the circuits solutions were not published before and have been used in recent industrial ICs. Yet it is not another cookbook with analog circuit recipes. The goal of this presentation is to arm the engineers with a tool helping to invent the solution for any analog design problem and, at the same time, be reasonably sure that this solution is one of the best possible for any given process and set of constraints. |
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