{"id":7851,"date":"2022-11-21T08:44:35","date_gmt":"2022-11-21T08:44:35","guid":{"rendered":"https:\/\/mead.ch\/mead\/?p=7851"},"modified":"2026-03-30T10:06:13","modified_gmt":"2026-03-30T10:06:13","slug":"introduction-to-analog-design","status":"publish","type":"post","link":"https:\/\/mead.ch\/mead\/introduction-to-analog-design\/","title":{"rendered":"Introduction to Analog Design"},"content":{"rendered":"

<\/a><\/p>\n

Abstracts<\/a>Practical Information<\/a>Course Material<\/a><\/div>\n

On-Line Class
\nCET – Central European Time Zone<\/span><\/h3>\n

Download One-Page Schedule Here<\/a><\/p>\n\n\n\n
\n

November 16-18 and 23-25, 2026<\/h4>\n

Registration deadline: November 2, 2026<\/strong><\/span>
\nPayment deadline: November 9, 2026<\/strong><\/span><\/td>\n

\"registration\"<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n\n\n\n\n\n\n
\n

TEACHING HOURS
\n<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

DAILY<\/td>\nCentral European Time CET<\/strong><\/td>\nEastern Standard Time EST<\/strong><\/td>\nPacific Standard Time PST<\/strong><\/td>\nIndia Standard Time IST<\/strong><\/td>\n<\/tr>\n
Module 1<\/td>\n3:00-4:30 pm<\/td>\n9:00-10:30 am<\/td>\n6:00-7:30 am<\/td>\n7:30-9:00 pm<\/td>\n<\/tr>\n
Module 2<\/td>\n5:00-6:30 pm<\/td>\n11:00-12:30 am<\/td>\n8:00-9:30 am<\/td>\n9:30-11:00 pm<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Modules all taught by Klaas Bult, Analog Design Consult, The Netherlands<\/b>
\n<\/strong><\/span><\/h3>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

Monday, November 16<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

Introduction<\/strong> – Types of Analysis and Introduction to OpAmps & Feedback. Time-Domain & Stability.<\/td>\n<\/tr>\n
MOS-Transistor<\/strong> – The MOS-Transistor – Principle. Week Inversion.<\/td>\n<\/tr>\n
\n

Tuesday, November 17<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

MOS-Transistor<\/strong> – Second-Order Effects.<\/td>\n<\/tr>\n
Making Gain<\/strong> – How to make Gain? DC & AC Behavior. Transient Behavior & Fundamental Limitations. How to Make Gain? Cascoding!<\/td>\n<\/tr>\n
HW0 – Introduction to Homeworks<\/span><\/b><\/td>\n<\/tr>\n
\n

Wednesday, November 18<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

Gain-Boosting<\/strong> – How to make even more Gain ? Gain-Boosting! Settling Behavior & Handling Doublets. Judging Settling Behavior.<\/td>\n<\/tr>\n
Noise<\/strong> – Noise Origins and Basic Properties.<\/td>\n<\/tr>\n
HW1 – Interview Questions!<\/span><\/b><\/td>\n<\/tr>\n
\n

Monday, November 23<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

Noise<\/strong> – How to Handle Noise in Circuit Analysis? Noise in Circuit Design<\/td>\n<\/tr>\n
Distortion<\/strong> – Distortion Analysis of Slightly Nonlinear Circuits. Distortion and Feedback. Example of Distortion Calculation.<\/td>\n<\/tr>\n
HW2 – Noise<\/span><\/b><\/td>\n<\/tr>\n
\n

Tuesday, November 24<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

Distortion<\/strong> – Example with Numbers. Advanced Topics in Distortion. Distortion in Multi-Stage Designs.<\/td>\n<\/tr>\n
Basic Building Blocs<\/strong> – Basic Sub-Circuits: Sourse Follower, Differential Pairs, Current Sources & Biasing.<\/td>\n<\/tr>\n
HW3 – Distortion<\/span><\/b><\/td>\n<\/tr>\n
\n

Wednesday, November 25<\/strong><\/span><\/h4>\n<\/td>\n<\/tr>\n

Architectures<\/strong> – Single-Ended OpAmp Architectures. Fully Differential OpAmp Architectures. OpAmp Design for Certain Specifications.<\/td>\n<\/tr>\n
Two-Stage Design<\/strong> – 2-Stage OpAmps: Compensation, Pole Splitting, Transfer-Function & Time Constants, Stability Limits & The Nulling Resistor, Summary.<\/td>\n<\/tr>\n
HW4 – Two-Stage Design<\/span><\/b><\/td>\n<\/tr>\n
\"registration\"<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Scroll to Top<\/a><\/p>\n

\n

<\/a><\/p>\n

Abstracts<\/strong><\/span><\/h2>\n\n\n\n
\n

Introduction to Analog Design
\nOn-Line Class
\nNovember 16-18 and 23-25, 2026
\nModules all taught by Klaas Bult,
\n<\/span>Analog Design Consult, The Netherlands<\/span><\/strong><\/b><\/p>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

Course Overview<\/b><\/span><\/p>\n<\/td>\n<\/tr>\n

This course is aimed at engineers with some background in Electrical Engineering, who wish to know more about analog CMOS design. Some familiarity with SPICE simulations and basic knowledge about feedback theory is assumed. The course will use the ubiquitous OpAmp as a design vehicle, to give some focus on the design, starts with an explanation of the MOS transistor and ends with Folded-Cascode and 2-Stage amplifiers. It deals with all aspects of analog design, including amplifier architectures, noise, distortion, frequency behavior & stability and settling behavior. Each lecture day includes homeworks that are subsequently discussed on the following day.<\/td>\n<\/tr>\n
Types of Analysis <\/em><\/strong>
\nDC-analysis, AC-analysis, the importance of bias-points, Transient-analysis and FFTs. SPICE simulation parameters and the importance of maxstep<\/em>.<\/td>\n<\/tr>\n
The OpAmp <\/em><\/strong>
\nWhat is an OpAmp? How do you use an OpAmp? The effect of Feedback. OpAmp versus OTA. Models for OpAmps\/OTAs. Time-domain behavior and stability. Nyquist diagram and stability margins. Opening the loop. Feedback and asymptotes. Conditional stability. Signal integrity, Noise, Distortion, Dynamic Range, SNR, SDR and SNDR.<\/td>\n<\/tr>\n
The MOS-Transistor<\/strong> <\/em>
\nPrinciple of Operation. Regions of Operation. Calculation of the MOS-current. Local Channel-Conductivity. Graphical MOS-models.A more accurate approach. Weak-Inversion. Equivalent visual model based on water. Second order effects.<\/td>\n<\/tr>\n
How to make Gain?
\n<\/em><\/strong>Introduction of the Common-Source<\/em> amplifier. Detailed description of how gain comes about. DC, AC and Transient behavior. Device optimization for Settling Behavior<\/em>. Main limitations of the Common-Source<\/em> stage in terms of frequency behavior and Gain. Introduction of the Process-Line<\/em>.<\/td>\n<\/tr>\n
How to make more Gain?<\/strong> <\/em>
\nIntroduction of the Cascode-Stage<\/em>. Effects on DC, AC and Transient behavior. Limitations<\/em> of the Cascode Stage<\/em>. Device Transit-Frequency Ft<\/sub><\/em>. Cascode Process-Line. Mobility Reduction. Velocity Saturation.<\/td>\n<\/tr>\n
How to make even more Gain?<\/strong> <\/em>
\nGain-Boosting introduction. Repetitive Gain-Boosting. Effect on Process-Line. High-Frequency Behavior.<\/td>\n<\/tr>\n
Optimizing Setlling Behavior<\/strong> <\/em>
\nGain-Boosting Settling Behavior. Doublets. How to Judge Settling Behavior. Optimizing Gain-Boosting Settling Behavior.<\/td>\n<\/tr>\n
Judging Setlling Behavior<\/strong> <\/em>
\nWhy is it not straightforward to judge settling behavior? Introduction of the Settling Plot. What can we learn from the Settling Plot?<\/td>\n<\/tr>\n
Noise<\/em><\/strong>
\nIntroduction to Noise in Circuits. Probability. Standard Deviation. Spectrum. Basic properties. kT\/C-noise. MOSFET-noise. 1\/f-noise.\u00a0 Knee-frequency and Ft<\/sub>. How to calculate noise of a circuit? Noise Integration and Signal to Noise Ratio (SNR).<\/td>\n<\/tr>\n
Noise in Circuit Design<\/strong><\/em>Noise of Common-Source Amplifier. Noise and Layout. Noise optimization. Noise Power Excess. Noise of the Cascode Transistor.<\/td>\n<\/tr>\n
Distortion<\/em><\/strong>
\nSlightly nonlinear systems. How to calculate distortion? Symmetrical systems. Distortion and Feedback. Distortion of the Reciprocal Relation. Distortion and Feedback again. Example with Numbers.<\/td>\n<\/tr>\n
Basic Sub-Circuits<\/strong> <\/em>
\nCS-stage (Gain-Stage), CG-stage (Cascode), CD-stage (Source-Follower). Differential Pair. Current Sources. Biasing & Current Mirrors. Voltage Mode Biasing. Current-Mode Biasing. Constant gm-biasing. Biasing in Simulation. Replica Biasing.<\/td>\n<\/tr>\n
OpAmp Architectures & Design<\/strong> <\/em>
\nSimple OpAmp Architectures. Folded-Cascode OpAmp. Fully Differential Architectures. More Advanced Differential Architectures. How to Design Single-Stage OpAmps? Noise. Slew-Rate & Distortion. Biasing.<\/td>\n<\/tr>\n
2-Stage OpAmps<\/strong> <\/em>
\nNeed for Compensation. Ideal Compensation Impedance. Miller-Compensation. Pole-Splitting. Transfer-Function and Tiem-Constants. Increasing Cload<\/sub> and Stability. Nulling Resistor. When do you actually use a 2-stage Miller-compensated OpAmp?<\/td>\n<\/tr>\n
\"registration\"<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Scroll to Top<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

AbstractsPractical InformationCourse Material On-Line Class CET – Central European Time Zone Download One-Page Schedule Here November 16-18 and 23-25, 2026 Registration deadline: November 2, 2026 Payment deadline: November 9, 2026 TEACHING HOURS DAILY Central European Time CET Eastern Standard Time EST Pacific Standard Time PST India Standard Time IST Module 1 3:00-4:30 pm 9:00-10:30 am<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"jetpack_post_was_ever_published":false,"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[31],"tags":[],"class_list":["post-7851","post","type-post","status-publish","format-standard","hentry","category-on-line-class"],"yoast_head":"\nIntroduction to Analog Design - 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