David Atienza Alonso is a professor of Electrical and Computer Engineering, and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures.
Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.

Luca Benini Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the Universita di Bologna. He received a PhD from Stanford University. He has been visiting professor at Stanford University, IMEC, EPFL. He served as chief architect in STmicroelectronics France. Dr. Benini’s research interests are in energy-​efficient parallel computing systems, smart sensing micro-​systems and machine learning hardware. He has published more than 1000 peer-​reviewed papers and five books. He is an ERC-​advanced grant winner, a Fellow of the IEEE, of the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg award,the 2019 IEEE TCAD Donald O. Pederson Best Paper Award and the ACM/IEEE A. Richard Newton Award 2020.

Tijmen Blankevoort, is the team lead for neural network efficiency research in Qualcomm, and director of the Qualcomm Amsterdam office. With a background in Japanese studies, Mathematics and Artificial Intelligence; he founded deep-learning start-up Scyfer in 2013, together with Prof. Max Welling, which was acquired by Qualcomm in 2017. He is now conducting research in the areas of quantization, neural network compression, conditional computing and anything related to running deep learning efficiently.

Klaas Bult (MSc. 1984, Ph.D. 1988) is VP of Data Acquisition Engineering and General Manager of Ethernovia Netherlands and a part-time professor at Delft University. In the past 20 years, he was Vice President and CTO of Central Engineering at Broadcom Corporation (1998 – 2016). He also started and led both Broadcom’s Analog Group in Irvine, CA (1994 – 1998) as well as Broadcom’s Design Center in Bunnik, The Netherlands (1998 – 2016). Before joining Broadcom, he was an Associate Professor at UCLA, Los Angeles (1994 – 1996), a part-time, full professor at Twente University (1993 – 1994) and a research scientist at Philips Research Laboratories (1988 – 1994).
Early work (Philips Research Laboratories) focused on analog circuits for audio and video applications, with examples like the Gain-Boosting technique (ISSCC 1990) and the Current-Division technique (ISSCC 1992). At Broadcom, he concentrated on high-performance analog circuits embedded in large SoCs for applications such as Analog Front-Ends for Cable Set-Top Boxes, Cable Modems, 10M/100M Base-T Ethernet, Gigabit Ethernet, and 10G Base-T Ethernet. At Ethernovia, his current focus is on 10G Ethernet for automotive applications.
Klaas Bult is a very active teacher. He taught numerous courses, primarily on transistor-level analog design and high-speed data-converter design at Twente University, UCLA, Delft University and MEAD Education.
Klaas Bult is an author of 65 international publications and holds 65 issued US patents. He is a Broadcom Fellow, an IEEE Fellow, was the recipient of 5 ISSCC Best Paper Awards, 2 Best Evening Panel Awards and 2 Best Forum Speaker Award. Klaas Bult has served 12 years on the ISSCC Technical Program Committee, 24 years on the ESSCIRC Technical Program Committee and 7 years as a member of the ESSCIRC/ESSDERC Steering Committee. In 2020, Klaas Bult was awarded the IEEE Donald O. Pederson Award.

Andreas Burg  (Senior Member, IEEE) was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland, in 2000, and the Dr. sc. techn. degree from the Integrated Systems Laboratory of ETH Zurich, in 2006. In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he worked at Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he was a postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory. In January 2011, he joined the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory (TCL). He was promoted to Associate Professor with Tenure in June 2018. In 2021 he co-founded RAAAM Memory Technologies, where he serves as Head of Technology to commercializes the highest density embedded memory in any standard CMOS technology.
Mr. Burg has served on the TPC of various conferences on signal processing, communications, and VLSI. He was a TPC co-chair for VLSI-SoC 2012 and the TCP co-chair for ESSCIRC 2016 and SiPS 2017. He was a General Chair of ISLPED 2019 and he served as an Editor for the IEEE TRANSACTION OF CIRCUITS AND SYSTEMS and for IEEE TRANSACTIONS ON VLSI. His research interest is in digital integrated circuits, including VLSI signal processing, embedded systems, computer architecture, and EDA.

Gael F. Close received a B.Sc. (Eng.) in Electrical Engineering from the University of Liège, Liège, Belgium, in 2003 and M.S. and Ph.D. degrees in Electrical Engineering from Stanford University, in 2004 and 2008, respectively. From 2008 to 2011, he was with IBM Research, Zurich, Switzerland, developing phase-change memory chips. Since 2011, he has been with Melexis, Switzerland. As a Senior System Engineer, he led the technical development of the magnetic sensor product line. He has some 30 peer-reviewed publications about nano-electronic devices, circuit/system design, and sensor product development. He holds 1 patent, and is an IASCC Six Sigma Black Belt (2017).

Giovanni De Micheli is a research scientist in electronics and computer science. He is credited for the invention of the Network on Chip design automation paradigm and for the creation of algorithms and design tools for Electronic Design Automation (EDA). He is Professor and Director of the Integrated Systems Laboratory at EPFL Lausanne, Switzerland. Previously, he was Professor of Electrical Engineering at Stanford University. He was Director of the Electrical Engineering Institute at EPFL from 2008 to 2019 and program leader of the Swiss Federal Nano-Tera.ch program. He holds a Nuclear Engineer degree (Politecnico di Milano, 1979), a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science (University of California at Berkeley, 1980 and 1983).
Prof. De Micheli is a Fellow of ACM, AAAS and IEEE, a member of the Academia Europaea and an International Honorary member of the American Academy of Arts and Sciences. His current research interests include several aspects of design technologies for integrated circuits and systems, such as synthesis for emerging technologies. He is also interested in heterogeneous platform design including electrical components and biosensors, as well as in data processing of biomedical information. He is author of: Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994, co-author and/or co-editor of ten other books and of over 900 technical publications. His citation h-index is above 100 according to Google Scholar. He is member of the Scientific Advisory Board of IMEC (Leuven, B) and STMicroelectronics.
Prof. De Micheli is the recipient of the 2022 ESDA-IEEE/CEDA Phil Kaufman Award, the 2019 ACM/SIGDA Pioneering Achievement Award, and several other awards.

Tim Denison received his S.M. and Ph.D. in Electrical Engineering from the Massachusetts Institute of Technology, and his A.B. in Physics from the University of Chicago. He is currently a Technical Fellow and Director of Neuroengineering for Medtronic Neuromodulation, after working as an IC and sensor design engineer for several years; more than one million people have implants with circuits that Tim helped develop. Tim’s primary interests are on implantable smart sensors, signal processing systems, and stimulators, with a particular focus on interfacing to the nervous system to provide therapy for chronic diseases. He won the 2006 Technical Contributor of the Year (TCOY) award at Medtronic for his work on micropower dynamic compensation techniques, and shared the 2008 TCOY award for the development of micropower inertial and pressure sensors. Prior to joining Medtronic, he worked as a Senior Design Engineer with the Micromachined Products Division at Analog Devices. Tim has given plenary lectures at several IEEE conferences including the VLSI Symposium, ISSCC (for Dr Oesterle) and ESSCIRC. He is an adjunct assistant professor in the division of engineering at Brown University, Providence, RI.

Sijun Du was born in Xiangyang, Hubei province, China. He received the B.Sc. degree (hons.) in Electronic Engineering from Pierre and Marie Curie University (UPMC) in 2011, and the M.Sc. degree (distinction) in Electrical & Electronic Engineering from Imperial College London in 2012. From 2012 to 2014, he was a digital IC design engineer in Shanghai. In October 2014, he became a Ph.D. candidate at the University of Cambridge, where he received the Ph.D. degree in 2018. After his Ph.D., he joined UC Berkeley as a postdoctoral researcher. He joined TU Delft in 2020, where he is currently an assistant professor at the Department of Microelectronics. His research is currently focused on energy-efficient circuits and systems, energy harvesting, wireless power transfer and power management ICs used in autonomous sensors & sensing systems for Internet of Things (IoT), wearable electronics, biomedical implants and microrobots.

Christian C. Enz, PhD, Swiss Federal Institute of Technology (EPFL), 1989. He is currently Professor at EPFL, Director of the Institute of Microengineering and head of the IC Lab. Until April 2013 he was VP at the Swiss Center for Electronics and Microtechnology (CSEM) in Neuchâtel, Switzerland where he was heading the Integrated and Wireless Systems Division. Prior to joining CSEM, he was Principal Senior Engineer at Conexant (formerly Rockwell Semiconductor Systems), Newport Beach, CA, where he was responsible for the modeling and characterization of MOS transistors for RF applications. His technical interests and expertise are in the field of ultra-low-power and low-noise analog and RF IC design and semiconductor device modeling. Together with E. Vittoz and F. Krummenacher he is the developer of the EKV MOS transistor model. He is the author and co-author of more than 260 scientific papers and has contributed to numerous conference presentations and advanced engineering courses. He is an IEEE Fellow and an individual member of the Swiss Academy of Engineering Sciences (SATW). He has been an elected member of the IEEE Solid-State Circuits Society (SSCS) AdCom from 2012 to 2014 and was Chair of the IEEE SSCS Chapter of Switzerland until 2017.

Rudy Eschauzier received his MSc and Ph.D. degrees in Electrical Engineering from Delft University of Technology in Delft, The Netherlands, specializing in analog and mixed-signal IC circuit design. Started his career with Philips Semiconductors, Sunnyvale, CA, U.S.A. and later joined National Semiconductor in Santa Clara, CA, U.S.A.. He moved back to The Netherlands to become co-founder of National Semiconductor’s Development Center in Delft. In 2007 he joined Maxim Integrated products to establish a design center for this company, also in Delft. In 2016, Rudy co-founded Delft Semiconductor B.V. in Delft, The Netherlands. Delft Semiconductor is a fabless semiconductor company focusing on analog and mixed-signal ICs for precision sensor interfacing, high-resolution data conversion and power management. He holds a number of U.S. and international patents and is author and co-author of several internationally published peer-review publications. Furthermore, Rudy Eschauzier co- authored the book “Frequency Compensation Techniques for Low-Power Amplifiers”, which was published by Kluwer Academic Publishers, Boston.

Viktor Fischer received his M.S. and Ph.D. degrees in Electrical Engineering from Technical University of Kosice in Slovakia. From 1981 to 1991 he held an Assistant Professor position at the Department of Electronics of the Technical University of Kosice. From 1991 to 2006 he was a part-time invited professor at the University of Saint-Etienne, France. From 1999 to 2006 he was also a consultant with Micronic Slovakia, oriented in hardware data security systems. From 2006 to September 2023 he was a full-time Professor at the University of Saint-Etienne. He is now retired, but still active as an Emeritus Professor at University of Saint-Etienne. His research interests include cryptographic engineering, secure embedded systems, cryptographic processors and especially true random number generators embedded in logic devices.

Qinwen Fan was born in Inner Mongolia, China. She received the B.Sc. degree in electronic science and technology from Nankai University in China in 2006 and the M.Sc. degree (cum laude) in microelectronics from Delft University of Technology, The Netherlands in 2008. She further continued as a PhD candidate in the same university and has received the degree in 2013. From August 2007 to August 2008, she was an intern at NXP Research Laboratories, Eindhoven, The Netherlands, where she designed a precision instrumentation amplifier for bio-medical purposes. From October 2012 to May 2015, she has been working at Maxim Integrated Products in Delft, The Netherlands. From June 2015 to January 2017, she has been working at Mellanox in Delft, the Netherlands. Since March 2017, she has rejoined TU Delft to as a post doc researcher and is currently working on class D amplifiers for automotive audio applications. Her research interests include precision amplifiers and ADCs; biomedical readout systems; class D audio amplifiers; magnetic sensor readout; current sensing and DC-DC power converters.

Ian Galton received his Ph.D. degree in electrical engineering from the California Institute of Technology in 1992, and is presently a Professor of electrical engineering at the University of California, San Diego where he teaches and conducts research in the field of mixed-signal integrated circuits and systems for communications. He was formerly with UC Irvine, the NASA Jet Propulsion Laboratory, Acuson, and Mead Data Central. His published research involves the development of key communication system blocks such as data converters, frequency synthesizers, and clock recovery systems. In addition to his academic research, he regularly consults at several communications and semiconductor companies, and has served on a corporate Board of Directors and several Technical Advisory Boards.

Tobias Grosser is associate professor at the University of Cambridge. He was formerly a reader (associate professor) in the School of Informatics at the University of Edinburgh and a member of the Edinburgh Compiler and Architecture Design Group. He is most widely known for his work on polyhedral loop optimization in production compilers such as GCC (graphite) and LLVM (Polly) during his masters at University of Passau (DE) with Christian Lengauer and later his Ph.D. as a Google Fellow at Ecole Normale Supérieure Paris (FR) Albert Cohen. As Ambizione Fellow at ETH Zurich Tobias expanded his research towards high-performance linear programming solvers, domain-specific compilers (e.g., for climate science), and open-source software for hardware design. Today, Tobias is interested in bringing open-source production compiler technology to a wide range of domains (e.g, databases, SMT solvers, formal theorem provers) and is in particular interested in identifying new ideas that cross domain boundaries.

Frank K. Gurkaynak has obtained his B.Sc. and M.Sc. degree from Istanbul Technical University and his Ph.D. from ETH Zürich. He currently is a senior scientist working on computer architectures in the group of Luca Benini and director of the Microelectronics Design Center at ETH Zürich. He has been involved in the Parallel Ultra Low Power (PULP) platform project since its start in 2013 and has been a vocal advocate for open source activities.

Prof. Ali Hajimiri received his B.S. degree in Electronics Engineering from the Sharif University of Technology, and M.S. and Ph.D. degrees in electrical engineering from the Stanford University. Before joining the Faculty of Caltech, he worked at Philips Semiconductors, where he worked on a BiCMOS chipset for GSM and cellular units, at Sun Microsystems working on the UltraSPARC microprocessor’s cache RAM design methodology, and with Lucent Technologies (Bell Labs), Murray Hill, NJ, where he investigated low-phase-noise integrated oscillators. In 1998, he joined the Faculty of the California Institute of Technology, Pasadena, where he is Bren Professor of Electrical Engineering and Medical Engineering, Director of Caltech Holistic Integrated Circuit Laboratory, and co-Director of the Space-based Solar Power Project. His research interests are high-speed and high-frequency electronics and photonics integrated circuits for applications in sensors, biomedical devices, photonics, and communication systems.
Prof. Hajimiri is the author of The Design of Low Noise Oscillators (Boston, MA: Springer) and has authored and coauthored more than 250 refereed journal and conference technical articles. He has been granted more than 100 U.S. patents and has many more pending applications.
He is a Fellow of National Academy of Inventors (NAI). Prof. Hajimiri was selected to the TR35 top innovator’s list. He is also a Fellow of IEEE and has served as a Distinguished Lecturer of the IEEE Solid-State and Microwave Societies. He won the Feynman Prize for Excellence in Teaching, Caltech’s most prestigious teaching honor, as well as Caltech’s Graduate Students Council Teaching and Mentoring award and the Associated Students of Caltech Undergraduate Excellence in Teaching Award. He was the Gold medal winner of the National Physics Competition and the Bronze Medal winner of the 21st International Physics Olympiad, Groningen, Netherlands. He was a co-recipient of the IEEE Journal of Solid-State Circuits Best Paper Award, the International Solid-State Circuits Conference (ISSCC) Jack Kilby Outstanding Paper Award, a co-recipient of RFIC best paper award, a two-time co-recipient of CICC best paper award, and a three-time winner of the IBM faculty partnership award as well as National Science Foundation CAREER award and Okawa Foundation award. He co-founded Axiom Microdevices Inc., whose fully-integrated CMOS PA has shipped around 400,000,000 units, and was acquired by Skyworks Inc.
He has served on the Technical Program Committee of the International Solid-State Circuits Conference (ISSCC), as an Associate Editor of the IEEE Journal of Solid-State Circuits (JSSC), as an Associate Editor of IEEE Transactions on Circuits and Systems (TCAS): Part-II, a member of the Technical Program Committees of the International Conference on Computer Aided Design (ICCAD), Guest Editor of the IEEE Transactions on Microwave Theory and Techniques, and Guest Editorial Board of Transactions of Institute of Electronics, Information and Communication Engineers of Japan (IEICE).

Pavan Kumar Hanumolu is a Professor of Electrical and Computer Engineering at the University of Illinois, Urbana-Champaign. His research interests include high-speed I/O interfaces, digital techniques to compensate for analog circuit imperfections, time-based signal processing, and power-management circuits. Prof. Hanumolu is Editor-in-Chief of the Journal of Solid-State Circuits and has served as a technical program committee member of the International Solid-State Circuits Conference, Custom Integrated Circuits Conference, and VLSI Circuits Symposium. He received the Ph.D. degree in electrical engineering from Oregon State University in 2006.

Robert K. Henderson is a Professor of Electronic Imaging in the School of Engineering at the University of Edinburgh. He obtained his PhD in 1990 from the University of Glasgow. From 1991, he was a research engineer at the Swiss Centre for Microelectronics, Neuchatel, Switzerland. In 1996, he was appointed senior VLSI engineer at VLSI Vision Ltd, Edinburgh, UK where he worked on the world’s first single chip video camera. From 2000, as principal VLSI engineer in STMicroelectronics Imaging Division he developed image sensors for mobile phone applications. He joined University of Edinburgh in 2005, designing the first SPAD image sensors in nanometer CMOS technologies in the MegaFrame and SPADnet EU projects. This research activity led to the first high volume SPAD direct time-of-flight products. He benefits from a long-term research partnership with STMicroelectronics in which he explores medical, scientific and high speed imaging applications of SPAD technology. In 2014, he was awarded a prestigious ERC advanced fellowship. He is an advisor to Ouster Automotive, a Fellow of the IEEE and the Royal Society of Edinburgh.

Ron Hogervorst was born in Voorschoten, The Netherlands, on December 2, 1967. In 1991 he received the M.Sc. degree from the Delft University of Technology, The Netherlands. In 1996 he received the Ph.D. degree from the same university on the subject of low-power low-voltage CMOS operational amplifiers. In 1997 he joined Rockwell Semiconductors (Conexant), France, where he has been working as analog design engineer. In 1999 he has been consultant with VLSI/Philips working on a high speed DLL for RAMBUS interface. In December of the same year he joined the mixed signal wireless communication team of Texas Instruments France. Formerly with Centillium Communications, he worked with Conexant Systems in Sophia Antipolis, France. In 2006, he rejoined Centillium Communications (Ikanos) where he was responsible for Gigabit Serdes design. In 2011, he joined Maxim Integrated Products, Sophia Antipolis. He joined Heyday-ic in November 2018. He published many international peer-reviewed papers, holds several patents and published a book titled “Design of Low-Voltage, Low-Power Operational Amplifier Cells” with Kluwer Academic Publishers, Boston.

Johan H. Huijsing was born on May 21, 1938. He was a full professor in the chair of Electronic Instrumentation, Faculty of Electrical Engineering of the Delft University of Technology since 1990. Since 2003 he is Emeritus Professor. The research work of Johan Huijsing is particularly focussed on the systematic analysis and design of operational amplifiers, analog-to-digital converters and integrated smart sensors. He is author and co-author of some 250 papers, 40 patents and 13 books, and co-editor of 13 books. He is fellow of IEEE for contributions to the design and analysis of analog integrated circuits. He received the title of Simon Stevin Meester for applied research by the Dutch Technology Foundation. He is initiator of the international Workshop on Advances in Analog Circuit Design, which has been held annually since 1992. He is consultant for Philips Semiconductors, USA, since 1983, and for Maxim Integrated Products, USA, since 1998.

Vadim Ivanov, MSEE 1980, Ph.D. 1987, both in the USSR. Designed electronic systems and ASICs for naval navigation equipment from 1980 to 1991 in St. Petersburg, Russia and mixed signal ASICs for sensors, GPS/GLONASS receivers and for motor control between 1991 and 1995.
Joined Burr Brown (presently Texas Instruments, Tucson) in 1996, where worked on the operational, instrumentation, power amplifiers, references and switching and linear voltage regulators, and where he is currently the Operational Amplifier Technologist. Has 108 patents, with more pending, on analog circuit techniques and authored > 30 technical papers and three books: “Power Integrated Amplifiers” (Leningrad, Rumb, 1987), “Analog system design using ASICs” (Leningrad, Rumb, 1988), both in Russian, and “Operational Amplifier Speed and Accuracy Improvement”, Springer, 2004.

Taekwang Jang received his B.S. and M.S. in electrical engineering from the Korea Advanced Institute of Science and Technology, Korea, in 2006 and 2008, respectively. From 2008 to 2013, he worked at Samsung Electronics Company Ltd., Yongin, Korea, focusing on mixed-signal circuit design including analog and all-digital phase-locked loops for communication systems and mobile processors fabricated in 20-45nm CMOS process. In 2017, he received his Ph.D. from the University of Michigan; his dissertation was titled “Circuit and System Designs for Millimeter-Scale IoT and Wireless Neural Recording.” After working as a post-doctoral research fellow at the University of Michigan for one year, he joined ETH Zürich in 2018 as an assistant professor and is leading the Energy Efficient Circuits and IoT Systems group. He is also a member of the Competence Center for Rehabilitation Engineering and Science, and the chair of the IEEE solid-state circuits society, Switzerland chapter.
His research focuses on the circuits and systems for highly energy-constrained applications such as wireless sensor nodes and biomedical interfaces. Key building blocks such as sensor interface, energy harvester, power converter, optical or radio communication, near-threshold processor, frequency synthesizer, and data converters are of his primary interests. He holds 14 patents and (co)authored more than 60 peer-reviewed conferences and journal articles. He is the recipient of the 2021 Jan Van Vessem Award for Outstanding European Paper and the 2009 Guillemin-Cauer Best Paper Award. Since 2022, he has served as a member of the IEEE International Solid-State Circuits Conference (ISSCC), IMMD Program Subcommittee, and IEEE Asian Solid-State Circuits Conference (ASSCC), Analog Subcommittee. He is the chair of the 2022 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Frequency Generation Subcommittee.

David A. Johns, David A. Johns received the B.A.Sc., M.A.Sc., and Ph.D. degrees from the University of Toronto, ON, Canada, in 1980, 1983, and 1989, respectively. In 1988, he was hired at the University of Toronto where he is currently a Full Professor. He has on-going research programs in the general area of analog integrated circuits. His research work has resulted in more than 80 publications as well as the 1999 IEEE Darlington Award. Together with academic experience, he also has spent a number of years in the semiconductor industry and was a co-founder of a successful IP company called Snowbush Microelectronics. Dr. Johns served as a guest editor of the IEEE Journal of Solid-State Circuits and an Associate Editor for IEEE Transactions on Circuits and Systems as well as being a member of the SSCS Adcom from 2002 to 2008.

Marc Joye received his Ph.D. degree in applied sciences (cryptography) from the Université Catholique de Louvain, Belgium, in 1997. In 1998 and 1999, he was a post-doctoral fellow of the National Science Council, Republic of China. From 1999 to 2006, he was with the Card Security Group, Gemplus (now Gemalto), France. From 2006 to 2016, has been with the Security Labs, Technicolor, France (formerly Thomson R&D). From 2016 to 2022, he has been with NXP Semiconductors, USA. He is now working with Zama, France, a company working in homomorphic encryption. His research interests include cryptography, computer security, computational number theory, and smart-card implementations. He is author and co-author of more than 150 scientific papers and holds several patents. He serves in numerous program committees, including as program chair of CT-RSA 2003, CHES 2004, ACM-DRM 2008, FDTC 2010, ACM-DRM 2010, Pairing 2010, and InfoSecHiComNet 2011, CARDIS 2014, and AFRICACRYPT 2017. He is a member of the IACR and co-founder of the UCL Crypto Group.

Çetin K. Koç received his Ph.D. in Electrical & Computer Engineering from University of California Santa Barbara in 1988. His research interests are in cyber-physical security, cryptographic engineering, finite field arithmetic, random number generators, and neuromorphic engineering.
Koç is the co-founder of the Conference on Cryptographic Hardware and Embedded Systems. The CHES Conference is the second largest cryptography conference and the premier forum for presenting scientific advances in all aspects of cryptographic hardware and security of embedded systems. Koç is also co-founder of two other conferences: International Workshop on the Arithmetic of Finite Fields (WAIFI) and Security Proofs for Embedded Systems (PROOFS).
Koç is the founding Editor-in-Chief of the Journal of Cryptographic Engineering (JCEN), published by Springer. JCEN covers all aspects of design and implementation of cryptographic hardware and software.
In 2007, Koç was elected as IEEE Fellow for his contributions to cryptographic engineering. He has been in the editorial boards of IEEE Transactions on Computers (2003-2008 and 2015-now) and IEEE Transactions on Mobile Computing (2003-2007). He was a guest co-editor of April 2003, November 2008, and November 2018 issues of the IEEE Transactions on Computers/
Koç is the co-author of the three books Cryptographic Algorithms on Reconfigurable Hardware, Cryptographic Engineering, and Open Problems in Mathematics and Computational Science, published by Springer in 2007, 2009, and 2014, respectively. In addition to contributing to 7 conference proceedings as co-editor, he has also authored or co-authored more than 150 scientific papers, and 13 US patents. Koç supervised 21 PhD students and 40 MS students, and also directed research theses of 6 undergraduate students. 11 of his Ph.D. students are currently professors (4 in the US, 4 in Turkey, and 3 in other countries).
Currently, Koç has appointments at İstinye University (İstanbul, Turkey), Nanjing University of Aeronautics and Astronautics (Nanjing, China), and University of California Santa Barbara. His research is funded by private and national research organizations, on aspects of cryptographic engineering, finite field arithmetic, random number generators, cyber-physical security, and neuromorphic engineering performed within Koç Lab composed of postdoctoral researchers, PhD and MS candidates, and undergraduate students.

Michael Kraft works at the University of Leuven, Department of Electrical Engineering – MICAS as a full Professor of Micro- and Nanosystems since Oct. 2017.
From 2015 – 2017 he was at the University of Liege, Belgium and from 2012-2014, at the Fraunhofer Institute for Microelectronic Circuits and Systems in Duisburg, Germany, where he headed the Department of Micro- and Nanosystems focussing on fully integrated microsensors and biohybrid systems. He concurrently held the W3 Professorial Chair of Integrated Micro- and Nanosystems at the University of Duisburg-Essen. From 1999 to 2012 he was a faculty member and Professor of Micro-System-Technology at the University of Southampton, UK. Concurrently, he served as director of the Southampton Nanofabrication Centre (2010-12). He graduated with a Dipl.-Ing. (Univ.) in electrical and electronics engineering at the Friedrich Alexander Universität Erlangen-Nürnberg in 1993. In 1997 he was awarded a PhD from Coventry University on the development of a MEMS accelerometer. He then spent two years at the Berkeley Sensors and Actuator Centre at the University of California working on integrated MEMS gyroscopes.
He has 20 years of experience in micro- and nano-fabrication techniques, microsensors and actuators and their interface circuits. He has a broad interest in MEMS and nanotechnology ranging from process development to system integration of MEMS and nano-devices. In 2005 his research group developed the world’s first fifth order sigma-delta-modulator (SDM) interface for a MEMS accelerometer, and in 2007 a band-pass SDM for a MEMS gyroscope. He has done ground-breaking work on electrostatically levitated micro-objects for sensing and actuation applications, and developed several novel, micro-fabricated atom and ion chips. He has published over 250 peer reviewed journal and conference publications as an author or co-author. He also contributed to three text books on MEMS, and edited a book on MEMS for aerospace and automotive applications. He currently serves or has served on several steering and technical committees of international conferences such as IEEE Sensors, Transducers, Eurosensors, MME, MNE and ISSCC as well as being an associate senior editor for the journals Sensors and Sensors Systems and IEEE Sensors Letters.

Lakshmana Sundeep Javvaji received the Bachelor’s degree from IIIT Nuzvid, Nuzvid, India, in 2015, and the M.S. degree from IIT Madras, Chennai, India, in 2018. After that, he worked as an Analog Design Engineer at Texas Instruments, Bengaluru, India, till 2020. In December 2020, he joined as a Ph.D. Researcher at the Electronic Instrumentation Laboratory, Delft University of Technology (TU Delft), Delft, the Netherlands, where he is working on “low noise, high-speed ADCs”.

Klaas-Jan de Langen received the MSc and PhD degrees in Electrical Engineering from Delft University of Technology in Delft, The Netherlands, in 1991 and 1999, respectively. He specialized in ultra-low voltage opamps and high-speed opamps in CMOS, BiCMOS and bipolar technology. In 1999 he joined Philips Semiconductors (now NXP Semiconductors) where he worked on automotive ASICS, first in Sunnyvale,CA, and later in Nijmegen, The Netherlands. From 2008 to 2012 he designed DC-DC converters with Monolithic Power Systems in Nijmegen, The Netherlands. In 2012 he returned to NXP Semiconductors. He is currently with Sensixs Design BV, Delft. He published several international peer-reviewed papers, holds 9 US patents and published a book on “Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers” with Kluwer academic Publishers, Boston.

Antonio Liscidini received the Laurea (summa cum laude) and Ph.D. degrees in electrical engineering from the University of Pavia, Pavia, Italy, in 2002 and 2006, respectively.
He was a summer Intern with National Semiconductors, Santa Clara, CA, USA, in 2003, studying poly phase filters and CMOS low-noise amplifiers. From 2008 to 2012, he was an Assistant Professor with the University of Pavia and a consultant with Marvell Semiconductors, Pavia, in the area of integrated circuit design. In 2012, he moved to the Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada, where he is currently Full Professor and Associate Chair Undergraduate. From 2019 to 2022 he was consultant for Huawei Technology Group in the area of RFIC for optical communication and SerDes. Since 2022 has been consultant for Marvell Technology group. His research interests are focused on analog mixed signal interfaces with particular emphasis on the implementations of transceivers and frequency synthesizers for wireless-wireline communication and ultra-low power applications.
Dr. Liscidini was a recipient of the Best Student Paper Award at the IEEE 2005 Symposium on VLSI Circuits, co-recipient of the Best Invited Paper Award at the 2011 IEEE CICC and Best Student Paper Award at the 2018 IEEE ESSCIRC.
He is currently Associate Editor in Chief for IEEE Transactions on Circuits and Systems II: Express Briefs and Associate and IEEE Solid State Circuit Letters. He has served as an Associate Editor for IEEE Open Journal of Solid-State Circuit Society, IEEE Transactions on Circuits and Systems II: Express Briefs (2008-2011) (2017- 2018) and as a Guest Editor for the IEEE Journal of Solid-State Circuits (2013) (2016) and IEEE RFIC Virtual Journal (2018). He has been member for many conferences including ISSCC, ESSCIRC, and CICC. Between 2016 and 2018, he has been a Distinguished Lecturer of the IEEE Solid-State Circuits Society.

Huichu Liu, Huichu Liu received her B.S. in Peking University, Beijing, China in 2009, and Ph.D. in Electrical Engineering in Pennsylvania State University, State College, PA, in 2014. From 2015 to 2019, Huichu was a Staff Research Scientist in Intel Labs and working on process-optimized microarchitecture design, where she has made multiple innovations and technology transfers for driving energy efficiency breakthroughs in digital circuits and architectures with emerging technologies. Huichu was known as one of the key inventors of “MESO” — the Magnetoelectric Spin-Orbit logic that Intel proposed in 2018 for future CMOS replacement. She also worked on agile hardware design for edge inference AI accelerators in Artificial Intelligence Product Group at Intel Movidius. In 2019, Huichu joined Silicon Research Team in Reality Labs, Meta (formerly known as Facebook Inc). She is currently working on low power circuit techniques, machine learning accelerators and novel technologies for augment reality applications.
Huichu was one of five winners of 2019 Design Automation Conference (DAC) Under-40 Innovators Award for her contributions in emerging technology based circuit and architecture co-design in industry. She has over 50 publications and 26 issued U.S. patents. Huichu has served on the Technical Program Committee of Design Automation Conference (DAC) and International Conference on Computer-Aided Design (ICCAD), and currently on the Technical Program Committee of Design, Automation and Test in Europe Conference (DATE) and the International Solid-State Circuits Conference (ISSCC).

Kofi Makinwa is a Professor at Delft University of Technology, Delft, The Netherlands. Before this, he worked from 1989 to 1999 as a research scientist at Philips Research Laboratories in Eindhoven, The Netherlands. His main research interests are in the design of analog circuits and sensor interfaces. This has resulted in 16 books, over 250 technical papers and over 30 patents. He is the co-recipient of 15 best paper awards, from the JSSC, ISSCC, VLSI, ESSCIRC and Transducers, among others, and is an ISSCC top-10 contributor. Prof. Makinwa has been on the program committees of several IEEE conferences, and has served the Solid-State Circuits Society as a distinguished lecturer and as a member of the Adcom. He is currently the Analog Subcom chair of the ISSCC, a member of the editorial board of the Proceedings of the IEEE and a co-organizer of the Advances in Analog Circuit Design workshop and the Sensor Interfaces Meeting. He is an IEEE Fellow and a member of the Royal Netherlands Academy of Arts and Sciences.

Gerard Meijer received his M.Sc. and Ph.D. degrees in Electrical Engineering from the Delft University of Technology, Delft, The Netherlands, in 1972 and 1982, respectively. Since 1972 he has been a member of the Research and teaching staff of Delft University of Technology, where he is a professor, engaged in research and teaching on Analogue Electronics and Electronic Instrumentation. Since 1984, he has been consultant for industrial companies and research institutes. In 1996 he co-founded the company SensArt, where he is consultant in the field of sensor systems. In 1999 the Dutch Technology Foundation STW awarded him with the honouree degree “Simon Stevin Meester” and in 2001 he was awarded the Anthony van Leeuwenhoek chair at TUDelft. In addition to many journal and conference papers, Meijer is also author and editor of books in the field of sensor systems, published by IOP, Kluwer, Springer, Wiley and Elsevier.

Subhasish Mitra is William E. Ayer Professor in the Departments of Electrical Engineering and Computer Science at Stanford University. He is also the Associate Chair (Faculty Affairs) of Computer Science. Prof. Mitra directs the Stanford Robust Systems Group, leads the Computation Focus Area of the Stanford SystemX Alliance, and is a member of the Wu Tsai Neurosciences Institute. His research ranges across Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences. Results from his research group have influenced almost every contemporary electronic system, and have inspired significant government and research initiatives in multiple countries. He has held several international academic appointments — the Carnot Chair of Excellence in NanoSystems at CEA-LETI in France, Invited Professor at EPFL in Switzerland, and Visiting Professor at the University of Tokyo in Japan. Prof. Mitra also has consulted for major technology companies including Cisco, Google, Intel, Samsung, and Xilinx.
In the field of Robust Computing, he has created many key approaches for circuit failure prediction, on-line diagnostics, QED system validation, soft error resilience, and X-Compact test compression. Their adoption by industry is growing rapidly, in markets ranging from cloud computing to automotive systems. His X-Compact approach has proven essential for cost-effective manufacturing and high-quality testing of almost all 21st century systems, enabling billions of dollars in cost savings.
With his students and collaborators, he demonstrated the first carbon nanotube computer. They also demonstrated the first 3D NanoSystem with computation immersed in data storage. These received wide recognition: cover of NATURE, Research Highlight to the US Congress by the NSF, and highlight as “important scientific breakthrough” by global news organizations.
Prof. Mitra’s honors include the Harry H. Goode Memorial Award (by the IEEE Computer Society for outstanding contributions in the information processing field), Newton Technical Impact Award in EDA (test-of-time honor by ACM SIGDA and IEEE CEDA), the University Researcher Award (by the Semiconductor Industry Association and Semiconductor Research Corporation to recognize lifetime research contributions), the Intel Achievement Award (Intel’s highest honor), and the US Presidential Early Career Award. He and his students have published over 10 award-winning papers across 5 topic areas (technology, circuits, EDA, test, verification) at major venues including the Design Automation Conference, International Solid-State Circuits Conference, International Test Conference, Symposium on VLSI Technology, Symposium on VLSI Circuits, and Formal Methods in Computer-Aided Design. Stanford undergraduates have honored him several times “for being important to them.” He is an ACM Fellow, an IEEE Fellow, and a Distinguished Alumnus of the Indian Institute of Technology, Kharagpur.

Boris Murmann received the Dipl.-Ing. (FH) degree in communications engineering from Fachhochschule Dieburg, Dieburg, Germany, in 1994, the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 1999, and the Ph.D. degree in electrical engineering from the University of California at Berkeley, Berkeley, CA, in 2003.
He is currently a Professor of Electrical & Computer Engineering at the University of Hawaiʻi, Mānoa. Prior to joining the University of Hawaiʻi, he served as an assistant, associate and full professor in the Department of Electrical Engineering at Stanford University, Stanford, CA, from 2004 to 2023. From 1994 to 1997, he was with Neutron Microelectronics, Hanau, Germany, where he developed low-power and smart-power ASICs. Since 2004, he has worked as a consultant with numerous Silicon Valley companies.
Dr. Murmann was a co-recipient of the Best Student Paper Award at the 2008 and 2021 VLSI Circuits Symposia, as well as a recipient of the Best Invited Paper Award at the 2008 IEEE Custom Integrated Circuits Conference (CICC). He received the 2009 Agilent Early Career Professor Award, the 2012 Friedrich Wilhelm Bessel Research Award by the Humboldt Foundation, and the 2021 SIA-SRC University Researcher Award for lifetime research contributions to the U.S. semiconductor industry.
His research interests are in the area of mixed-signal integrated circuit design. Specific topics include sensor interfaces, A/D and D/A conversion, high-speed communication links, embedded machine learning (tinyML) as well as open-source chip design.
Dr. Murmann is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE). He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS), the Data Converter Subcommittee Chair and Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC), Technical Program Co-Chair the IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) and the tinyML Research Symposium, as well as General Co-Chair of the IEEE International Symposium on Circuits and Systems (ISCAS). He currently chairs the IEEE SSCS Technical Committee on the Open-Source Ecosystem.

Christof Paar is Director at the Max Planck Institute for Cybersecurity and Privacy in Bochum, Germany, and is affiliated professor at the University of Massachusetts at Amherst. From 2001 to 2019 he held the Chair for Embedded Security at Ruhr-University Bochum, and from 1994 to 2001 he was with Worcester Polytechnic Institute in Massachusetts. He co-founded, with Cetin Koç, the CHES (Cryptographic Hardware and Embedded Systems) conference, the leading international event in cryptographic engineering. Christof’s research interests cover hardware security,  efficient implementation of cryptography, physical security and penetration of real-world systems. He co-founded ESCRYPT GmbH, which is one of the leading players in the area of automotive security; ESCRYPT is now part of Bosch. Christof has over 200 peer-reviewed publications in embedded security and holds several patents. He is fellow of the IEEE and the IACR (International Association of Cryptological Research). Christof has given invited talks at Harvard, MIT, Stanford, Yale, IBM, Intel and many other places. He has taught cryptography extensively in industry, including courses at NASA, Motorola Research, and Philips Research. He is co-author, with Jan Pelzl, of the popular textbook “Understanding Cryptography: A Textbook for Students and Practitioners”.

Samuel Palermo received the Ph.D. degree in electrical engineering from Stanford University in 2007. From 1999 to 2000, he was with Texas Instruments, Dallas, TX, where he worked on the design of mixed-signal integrated circuits for high-speed serial data communication. From 2006 to 2008, he was with Intel Corporation, Hillsboro, OR, where he worked on high-speed optical and electrical I/O architectures. In 2009, he joined the Electrical and Computer Engineering Department of Texas A&M University where he is currently an associate professor. His research interests include high-speed electrical and optical interconnect architectures, RF photonics, high performance clocking circuits, and integrated sensor systems. He has previously served as a distinguished lecturer for the IEEE Solid-State Circuits Society and currently serves on the TPC for ISSCC, CICC, and OIC.

Shanthi Pavan received the B.Tech from IIT Madras in 1995 and the doctoral degree from Columbia University, New York City, in 1999. He is currently a Professor of Electrical Engineering at IIT Madras. His research interests are in the areas of high speed analog circuit design and signal processing.
He is a recipient of many awards, including the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Swarna Jayanthi Fellowship (2009) and the Shanti Swarup Bhatnagar Award (2012). He has served as the Editor-in-Chief of the IEEE Transactions on Circuits and Systems: Regular Papers. He has served on the Technical Program Committee at the International Solid State Circuits Conference (ISSCC), and as a Distinguished Lecturer of the Circuits and Systems, and  Solid-State Circuits Societies.  He is an IEEE fellow.
He is the coauthor (with Richard Schreier and Gabor Temes) of “Understanding Delta Sigma Converters”, published by the Wiley-IEEE Press.

Marcel Pelgrom received his M.Sc and PhD from Twente University, Enschede The Netherlands. In 1979 he joined Philips Research Laboratories, where his research has covered topics as Charge Coupled Devices, MOS matching properties, analog-to-digital conversion, digital image correlation, and various analog building block techniques. His IEEE Journal of Solid-State Circuits paper on mismatch is the third most cited paper of this Journal. He has headed several project teams and was as a team leader for high-speed analog-to-digital conversion responsible for many conversion products. From 1996 till 2003 he was a department head for mixed-signal electronics research. In 2003 he spent a sabbatical in Stanford University where he was appointed a consulting professor. Till 2013 he was a member of the technical staff of NXP Semiconductors. Next to various activities concerning industry-academic relations, he was involved as a research fellow in research on substrate noise, variability and advanced conversion techniques. Presently he is an independent consultant. Marcel Pelgrom is an honorary professor at the KU Leuven. He served twice as an IEEE Distinguished Lecturer, as associate editor for IEEE TAS, and has written over 40 publications, two books, seven book chapters and holds 36 US patents. He is lecturing at Stanford, Twente and Delft Universities, and for MEAD/EPFL.

Michiel Pertijs received the M.Sc. and Ph.D. degrees in electrical engineering (both cum laude) from Delft University of Technology, Delft, The Netherlands, in 2000 and 2005, respectively. From 2000 to 2005, he worked as a researcher at the Electronic Instrumentation Laboratory of Delft University of Technology, on high-accuracy CMOS smart temperature sensors. From 2005 to 2008, he was with National Semiconductor, Delft, where he designed precision operational amplifiers and instrumentation amplifiers. From 2008 to 2009, he was a Senior Researcher with IMEC / Holst Centre, Eindhoven, The Netherlands. In 2009, he joined the Electronic Instrumentation Laboratory of Delft University of Technology, where he is now an Associate Professor. He heads a research group working on integrated circuits for medical ultrasound and energy-efficient smart sensors. He has authored or co-authored one book, three book chapters, 10 patents, and over 50 technical papers. His research interests include analog and mixed-signal electronics and smart sensors.
Dr. Pertijs is an Associate Editor of the IEEE Journal of Solid-State Circuits, and a member of the technical program committees of the International Solid-State Circuits Conference (ISSCC), the European Solid-State Circuits Conference (ESSCIRC), and the IEEE Sensors Conference. He received the ISSCC 2005 Jack Kilby Award for Outstanding Student Paper, the IEEE JOURNAL OF SOLID-STATE CIRCUITS 2005 Best Paper Award, and the 2006 Simon Stevin Gezel Award from the Dutch Technology Foundation STW.

Jan Rabaey, holds the Donald O. Pederson Distinguished Professorship at the University of California at Berkeley. Before joining the faculty at UC Berkeley, he was a research manager at IMEC from 1985 until 1987. He is a founding director of the Berkeley Wireless Research Center (BWRC) and the Berkeley Ubiquitous SwarmLab, and has served as the Electrical Engineering Division Chair at Berkeley twice.
Prof. Rabaey has made high-impact contributions to a number of fields, including advanced wireless systems, low power integrated circuits, sensor networks, and ubiquitous computing. His current interests include the conception of the next-generation distributed systems, as well as the exploration of the interaction between the cyber and the biological world.
He is the recipient of major awards, amongst which the IEEE Mac Van Valkenburg Award, the European Design Automation Association (EDAA) Lifetime Achievement award, the Semiconductor Industry Association (SIA) University Researcher Award, and the SRC Aristotle Award. He is an IEEE Fellow, a member of the Royal Flemish Academy of Sciences and Arts of Belgium, and has received honorary doctorates from Lund (Sweden), Antwerp (Belgium) and Tampere (Finland). He has been involved in a broad variety of start-up ventures, including Cortera Neurotechnologies, of which he is a co-founder.

Abbas Rahimi received the B.S. degree in computer engineering from the University of Tehran in 2010, and the M.S. and Ph.D. degrees in computer science and engineering from the UC San Diego in 2015, followed by postdoctoral researches at the UC Berkeley, and at the ETH Zürich. In 2020, he has joined the IBM Research-Zürich laboratory as a Research Staff Member. His research interests include brain-inspired computing and neurosymbolic AI with an emphasis on sample efficiency, generalization, and efficient realization on emerging hardware platforms. Dr. Rahimi received the 2015 Outstanding Dissertation Award in the area of “New Directions in Embedded System Design and Embedded Software” from the European Design and Automation Association, and the ETH Zürich Postdoctoral Fellowship in 2017. He was a co-recipient of the Best Paper Nominations at DAC (2013) and DATE (2019), and the Best Paper Awards at BICT (2017), BioCAS (2018), and IBM’s Pat Goldberg Memorial Best Paper Award (2020).

Behzad Razavi Behzad Razavi holds a PhD from Stanford and is Professor of Electrical Engineering at UCLA. He has published more than 150 papers and seven books and received numerous awards for his research, teaching, and authorship. He is a Fellow and Distinguished Lecturer of IEEE and was recognized as one of the top 10 authors in the 50-year history of ISSCC. He received the 2012 IEEE Donald Pedeson Award in Solid-State Circuits for his pioneering contributions to the design of high-speed communication circuits.

Patrick Reynaert received his Ph.D. from the KU Leuven – Belgium in 2006. During 2006-2007, he was a post-doctoral researcher at UC Berkeley and a member of the Berkeley Wireless Research Center, where he worked on mm-wave CMOS circuits. In 2007, he was a visiting researcher at Infineon Technologies, Austria, Villach, where he worked on base-station power amplifiers. Since 2007, he is a professor at KU Leuven, Dept. of electrical engineering (MICAS), and is working on RF power amplifiers and CMOS mm-wave circuits.

Francisco Rodríguez-Henríquez received his PhD in electrical and computer engineering from Oregon State University in June 2000. His research interests are in cryptography, computer arithmetic and information security. He worked as a security architect in Germany and US, and later as a professor at the Advanced Research Center in Mexico City. Since 2021, he is Technical Director in the Cryptography Research Centre of the Technology Innovation Institute at Abu Dhabi, UAE. Dr. Rodríguez-Henríquez co-authored over 60 technical papers and several book chapters, winning the Best Paper Award in CHES 2009 and CHES 2013, and the runner-up award in CHES 2016 and Asiacrypt 2022. He also coauthored the book Cryptographic Algorithms on Reconfigurable Hardware published by Springer in 2006. He has been in the editorial boards of Journal of Cryptographic Engineering, IEEE Transactions on Emerging Topics in Computing, and IEEE Transactions on Computers. He is TCHES 2024 co-Editor-in-Chief and CRYPTO 2025 General Chair. He is also the co-founder of the International Conference on Cryptology and Information Security in Latin America.

Dr. Pankaj Rohatgi, is currently a Director of Engineering at Google, where he manages the teams responsible for providing the foundational technologies used to protecting Google’s infrastructure. Prior to Google, Pankaj was a Security Technology Fellow at Rambus Security Division and Technical Director, Hardware Security Solutions at Cryptography Research, where he managed their Secure Hardware, DPA Solutions and Advanced Product teams. From Aug 1996 to July 2009, Dr. Rohatgi was a Research Staff Member at IBM’s T. J. Watson Research Center where he also managed the Information Security Group. He received his Ph.D. from Cornell University in 1994. From 1993 to 1996 he was the security architect for the OpenTV operating system at Thomson R&D labs and at a Thomson/Sun Microsystems joint venture. Dr. Rohatgi has conducted basic research in several areas of applied cryptography, system and network security, privacy and secure hardware. He also worked and consulted on several security and cryptographic products. His research interests include side-channel cryptanalysis, applied cryptography, network and systems security and embedded systems. He has published over 40 technical articles and holds several patents and has been awarded two Outstanding Innovation Awards by IBM for his contributions to Side Channel Analysis and to the Security of IBM’s System S. His professional activities include active participation in the W3C DSIG Initiative, the IRTF SmuG working group and the IETF MSEC Working Group and in the CHES and WISA program committees. He was the guest editor of IEEE Internet Computing magazine’s special issue on Homeland Security and the Program co-Chair of CHES 2008. He is currently serving on the CHES Steering Committee.

Julien Ryckaert received the M.Sc. degree in electrical engineering from the University of Brussels (ULB), Belgium, in 2000 and the PhD degree from the Vrije Universiteit Brussel (VUB) in 2007. He joined imec as a mixed-signal designer in 2000 specializing in RF transceivers, ultra-low power circuit techniques and analog-to-digital converters. In 2010, he joined the process technology division in charge of design enablement for 3DIC technology. Since 2013, he is in charge of imec’s design- technology co-optimization (DTCO) platform for advanced CMOS technology nodes. In 2018, he became program director focusing on scaling beyond the 3nm technology node as well as the 3D scaling extensions of CMOS. Today, he is vice president logic in charge of compute scaling.

Bodhisatwa Sadhu received the B.E. degree in Electrical and Electronics Engineering from Birla Institute of Technology and Science – Pilani (BITS-Pilani) in 2007, and the Ph.D. degree in Electrical Engineering from University of Minnesota, Minneapolis, in 2012.
He is currently a Senior Research Scientist with the Communication Circuits & Systems Group at IBM T. J. Watson Research Center, Yorktown Heights, NY, USA, and was an Adjunct Assistant Professor at Columbia University, NY from 2017 to 2020. At IBM, he has led the design and demonstration of the world’s first reported silicon-based 5G phased array IC, a low power 60GHz CMOS transceiver IC for 802.11ad communications, a 256-element 5G phased array antenna module, a software-defined phased array radio, and several low phase noise frequency synthesizers. He has authored and co-authored 60+ peer-reviewed papers, the book Cognitive Radio Receiver Front-Ends (Springer, 2014), and several book chapters. He also holds 70+ issued US patents. Dr. Sadhu currently serves as an IEEE Distinguished Microwave Lecturer, an Associate Editor of IEEE Journal of Solid-State Circuits, Sub-committee Chair and Steering Committee Member of IEEE RFIC Symposium, TPC member of IEEE ISSCC, and has served as Guest Editor of IEEE TMTT in 2021 and IEEE JSSC in 2017.
Dr. Sadhu was a recipient of the 2022 IEEE MTT-S Outstanding Young Engineer Award, the 2017 ISSCC Lewis Winner Award for Outstanding Paper (Best Paper Award), the 2017 IEEE Journal of Solid State Circuits Best Paper Award, the 2017 Pat Goldberg Memorial Award for the Best Paper in computer science, electrical engineering, and mathematics published by IBM Research and co-recipient of the IEEE APMC prize in 2022. He received an IBM O-level Accomplishment Award for contributions to IBM P and Z mainframe processors, five IBM Outstanding Technical Achievement Awards, and was selected for the IBM Tech 2023 recognition for top technical contributors within IBM (among top ~2%). He stood 2nd in India in the Indian School Certificate (ISC) Examination in 2003 and won the BITS Pilani Silver Medal (2nd in class of more than 1000 students) in 2007. He was recognized as an IBM Master Inventor in 2017 and 2021 (three-year terms each) and selected by the National Academy of Engineering for its Frontiers of Engineering Symposium in 2020.

Pasquale Davide Schiavone (Davide) is a PostDoc at the Swiss Federal Institute of Technology Lausanne (EPFL) and Director of Engineering of the OpenHW Group. He obtained the Ph.D. title at the Integrated Systems Laboratory of ETH Zurich in the Digital Systems group in 2020 and the BSc. and MSc. from “Politecnico di Torino” in computer engineering in 2013 and 2016, respectively. His main activities are the RISC-V CPU design and low-power energy-efficient computer architectures for smart embedded systems and edge-computing devices.
Since the Ph.D., he delivers training workshops to companies and universities.

Werner Schindler is experienced in several fields of IT security, notably in cryptography, side-channel analysis and random number generators. He has been active in these fields for 25 years. He obtained a masterís degree in mathematics (Diploma) 1989, a doctorate in mathematics (Dr. rer. nat.) 1991, and a postdoctoral lecture qualification for mathematics (Habilitation) 1998, all at Darmstadt University of Technology, Germany. Since 1993 he is employed at the Bundesamt für Sicherheit in der Informationstechnik (BSI) (Federal Office for Information Security), Bonn, Germany. Since 2005 he is adjunct professor of mathematics (außerplanmäßiger Professor) at the Darmstadt University of Technology. For several years he was principle investigator at CASED (Center for Advanced Security Research Darmstadt) and the head of the research group CASCADE (Constructive Attacks | Side-Channel Analysis | Secure Design). He is co-founder of the international workshop COSADE and has about 90 scientific publications. He is co-editor of the mathematical-technical reference to the evaluation guidelines AIS 20 (deterministic RNGs) and AIS 31 (physical RNGs). These guidelines have been effective in the German certification scheme according to the Common Criteria for two decades.

Timothy J. Schmerbeck is a Senior Technical Staff Member on the Integrated Circuit (IC) development team in IBM’s Technology Development Group at Rochester, Minnesota. He has 34 years of experience designing IC’s. He received bachelor’s, and master’s degrees in electrical engineering from the University of Minnesota, Institute of Technology, in 1977 & 1985 respectively. His graduate work dealt with the design of a hybrid, integrated, analog signal processor IC for disk drive servo systems. He joined the Integrated Circuit (IC) design group at IBM in Rochester, MN in 1977 where he spent roughly 25 years working on virtually every aspect of analog and digital IC design & development for storage, communications, and computer systems. He has specialized in mixed analog and digital IC designs and has been teaching on the subject of IC signal integrity at seminars, worldwide, for two decades. Those seminars have influenced the development of the only chip substrate signal integrity analysis CAD on the market today. He has been given numerous IBM corporate and division awards and corporate honors including the title of Master Inventor. Since the acquisition of the IBM optical communications group by JDS Uniphase in December 2001, he spent three years designing 1 to 10 GHz optical transceiver ICs, until returning to IBM in late 2004. He has been involved with IEEE since 1975 when he was treasurer of the University of Minnesota student chapter. He has authored and contributed to numerous technical publications, conference presentations, panel sessions, tutorials, workshops, books, college courses, and holds many patents in IC design. In his spare time he studies theology and enjoys contemplating the works of the greatest engineer.

Fabio Sebastiano  received the B.Sc. (cum laude) and M.Sc. (cum laude) degrees in electrical engineering from University of Pisa, Italy, in 2003 and 2005, respectively, the M.Sc. degree (cum laude) from Sant’Anna school of Advanced Studies, Pisa, Italy, in 2006 and the Ph.D. degree from Delft University of Technology, The Netherlands, in 2011.
From 2006 to 2013, he was with NXP Semiconductors Research in Eindhoven, The Netherlands, where he conducted research on fully integrated CMOS frequency references, deep-submicron temperature sensors and area-efficient interfaces for magnetic sensors. In 2013, he joined Delft University of Technology, where he is currently an Assistant Professor. He has authored or co-authored one book, 11 patents and over 60 technical publications. His main research interests are cryogenic electronics for quantum computing, quantum computing, sensor read-outs and fully integrated frequency references.
Dr. Sebastiano has been a member of the “Emerging technologies” sub-committee of the technical program committee of the  RFIC Symposium. He was a co-recipient of the best student paper at ISCAS in 2008, the best paper award at IWASI in 2017 and the best IP award at DATE in 2018. He is a Distinguished Lecturer of the Solid-State Circuit Society.

Robert Bogdan Staszewski received the BSc (summa cum laude), MSc and PhD degrees from the University of Texas at Dallas in 1991, 1992 and 2002, respectively. From 1991 to 1995 he was with Alcatel Network Systems in Richardson, TX, USA, working on SONET cross-connect systems for fiber optics communications. He joined Texas Instruments in Dallas, TX, USA, in 1995 where he was elected Distinguished Member of Technical Staff (2% of the technical population). Between 1995 and 1999, he was engaged in advanced CMOS read channel development for hard disk drives. In 1999 he co-started a Digital RF Processor (DRP) group within Texas Instruments with a mission to invent new digitally intensive approaches to traditional RF functions for integrated radios in deep-submicron CMOS. He served as a CTO of the DRP group between 2007 and 2009. In 2009, he joined Delft University of Technology in the Netherlands where he is currently a guest Full Professor. Since 2014, he has been a Full Professor with University College Dublin in Ireland. He has authored and co-authored five books, seven book chapters, 290 journal and conference publications, and holds 180 issued US patents. His research interests include nanoscale CMOS architectures and circuits for frequency synthesizers, transmitters and receivers, as well as quantum computers. He is an IEEE Fellow and recipient of IEEE Circuits and Systems Industrial Pioneer Award.

Michiel S.J. Steyaert (IEEE-Fellow 2003) received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the KULeuven, Heverlee, Belgium in 1983 and 1987, respectively.
From 1983 to 1986 he obtained a Belgian National Foundation for Industrial Research (IWONL) fellowship at the Laboratory ESAT, KULeuven. In 1987 he was responsible for several industrial projects in the field of analog micro power circuits at the Laboratory ESAT as an IWONL Project Researcher. In 1988 he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT-MICAS, KULeuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the KULeuven. He was the Chair of the Electrical Engineering Department from 2005 until 2012. He is now Dean of the Faculty of Engineering. His current research interests are in fully integrated power management, high-performance analog signal processing and high-frequency analog integrated circuits for telecommunication systems.
Prof. Steyaert authored or co-authored over 700 papers in international journals or proceedings and co-authored over 30 books. He received the 1990 and 2001 ESSCIRC Best Paper Award, in 1991 and 2000 the NFWO Alcatel-Bell-Telephone award, the 1995 and 1997 IEEE-ISSCC Evening Session Award, the 2016 IEEE-ISSCC Distinguished Technical Paper Award, the 2017 IEEE-ISSCC Jan Van Vessem Award for outstanding European Paper, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and is currently an IEEE-Fellow. He received one of the first (2008) ERC-advanced grants and is the only European researcher who received both, in 2003 the 50^th anniversary and in 2013 the 60^th anniversary top ISSCC contributors award for his strong and sustained contributions.

Armin Tajalli (IEEE-Fellow 2003) Tajalli received his B.S. from Sharif University of Technology, Tehran, Iran, and the Ph.D. from Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland. He has 20 years of industrial experience in the field of analog and mixed-signal circuit design. He was a Senior Analog Architect with Kandou Bus, Lausanne, Switzerland (2010-2017). Since December 2017, he has joined University of Utah as an Assistant Professor. He has published 80+ articles in the peer reviewed Conferences and Journals, and holds 30+ patents.

Filip Tavernier is professor in the MICAS research division of the Department of Electrical Engineering of KU Leuven since October 2015. Currently, his main research interests are high performance data converters, integrated DC-DC converters, optical receivers and radiation-hard chip design. Filip obtained his PhD degree from KU Leuven in 2011, after which he joined the micro-electronics group at CERN in Geneva, Switzerland as a senior fellow for a 3-year period. He joined MICAS again in the beginning of 2014, establishing a group focusing on the above mentioned research topics. Filip is proud to have achieved KU Leuven becoming an associate member of the CMS Collaboration at CERN, in which framework he is still collaborating actively with researchers in the HEP community. He is member of the TPC of ESSCIRC, published 1 book, 15 journal papers and 15 conference papers.

Gabor C. Temes, Ph.D., University of Ottawa, 1961. Professor, Electrical and Computer Engineering Department, Oregon State University, Professor Emeritus, UCLA. Formerly with UCLA, Ampex Corp., Stanford University and BNR. Life Fellow IEEE. He wrote many books and papers on circuit design and data converters. He received the Technical Achievement Award and the Education Award of the IEEE CAS Society, as well as the IEEE Centennial Medal. He is also the recipient of the 1998 IEEE Graduate Teaching Award and received the IEEE Millennium Medal and the IEEE/CAS Golden Jubilee Medal in 2000. He received the IEEE Gustav Robert Kirchhoff Award in 2006, and the IEEE Mac Van Valkenburg Award in 2009.

Albert Theuwissen received the degree in electrical engineering and his PhD from the Catholic University of Leuven (Belgium) in 1977 and 1983 respectively. Over the last 25 years he worked for Philips and DALSA, both in the field of solid-state imaging. He issued several patents and he is author or coauthor of many technical papers, including a textbook “Solid‑State Imaging with Charge‑Coupled Devices”. He acted as general chairman of the International Image Sensor Workshop in ’97, ’03, ‘09 and in ’15, and as International Technical Program Chair of the ISSCC2010. In March 2001, he became part-time professor at the Delft University of Technology, the Netherlands. He left DALSA in September 2007, and founded Harvest Imaging. Since then he is fully focusing on training, teaching and consulting in the field of solid-state imaging technology. In 2011 he received the Electronic Imaging of the Year Award and in 2017 he was elected as the President of the International Image Sensor Society.

Ingrid Verbauwhede, Ph.D., 1991, KU Leuven, Belgium. Formerly associate professor at UCLA, she is now Professor at the Faculty of Engineering (ESAT) of KU Leuven, Belgium. Her main interests are in architecture design together with design methods for domain specific processors. More specifically, she interested in the design of processors for applications that require very high throughput or very low power and that cannot be addressed by general purpose solutions. Examples are wireless communications and cryptography. She has built processors for each of these application domains.

Marian Verhelst (Senior Member, IEEE) received the Ph.D. degree from KU Leuven, Belgium, in 2008. She was a Visiting Scholar with the Berkeley Wireless Research Center, University of California Berkeley, in the Summer 2005, and a Research Scientist with Intel Labs, Hillsboro, OR, USA, from 2008 to 2011.
She is currently a Full Professor with the MICAS Laboratories, Department of Electrical Engineering, KU Leuven. Her research focuses on embedded machine learning, hardware accelerators, self-adaptive circuits and systems, sensor fusion, and low-power edge processing. She is a member of the DATE and ISSCC Executive Committees, the TPC Co-Chair of AICAS 2020 and tinyML 2020, and a TPC Member of DATE and ESSCIRC.
She was a member of the Young Academy of Belgium and the STEM Advisory Committee to the Flemish Government. She currently holds a prestigious ERC Starting Grant from the European Union and was the laureate of the Royal Academy of Belgium in 2016. She was an Associate Editor for IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Circuits and Systems—II: Express Briefs, and IEEE Journal of Solid-State Circuits. She is an SSCS Distinguished Lecturer.

Naveen Verma (Senior Member, IEEE) received the B.A.Sc. degree in electrical and computer engineering from The University of British Columbia, Vancouver, BC, Canada, in 2003, and the M.S. and Ph.D. degrees in electrical engineering from MIT Cambridge, MA, USA, in 2005 and 2009, respectively.
Since July 2009, he has been with Princeton University, Princeton, NJ, USA, where he is currently the Director of the Keller Center for Education in Innovation and Entrepreneurship and a Professor of electrical engineering. His research focuses on advanced sensing systems, exploring how systems for learning, inference, and action planning can be enhanced by algorithms that exploit new sensing and computing technologies. This includes research on large area, flexible sensors, energy-efficient statistical-computing architectures and circuits, and machine learning and statistical-signal-processing algorithms.
Prof. Verma was a recipient or a co-recipient of the 2006 DAC/ISSCC Student Design Contest Award, the 2008 ISSCC Jack Kilby Paper Award, the 2012 Alfred Rheinstein Junior Faculty Award, the 2013 NSF CAREER Award, the 2013 Intel Early Career Award, the 2013 Walter C. Johnson Prize for Teaching Excellence, the 2013 VLSI Symposium Best Student Paper Award, the 2014 AFOSR Young Investigator Award, the 2015 Princeton Engineering Council Excellence in Teaching Award, and the 2015 IEEE Transactions on Components, Packaging and Manufacturing Technology Best Paper Award. He also serves on the technical program committees for ISSCC, VLSI Symposium DATE, and the IEEE Signal-Processing Society (DISPS). He has served as a Distinguished Lecturer for the IEEE Solid-State Circuits Society.

Hua Wang Hua Wang is a full professor and chair of electronics at Department of Information Technology and Electrical Engineering (D-ITET) of Swiss Federal Institute of Technology Zürich (ETH Zürich). He is the director of the ETH Integrated Devices, Electronics, And Systems (IDEAS) Group.

Bernhard Wicht has 20+ years of experience in analog and smart power IC design. He received the Dipl.‑Ing. degree in electrical engineering from University of Technology Dresden, Germany, in 1996 and the Ph.D. degree from University of Technology Munich, Germany, in 2002. Between 2003 and 2010, he was with the Mixed-Signal Automotive business unit of Texas Instruments in Freising, Germany, responsible for the design of automotive power management ICs. In September 2010, he became a full professor for integrated circuit design and a member of the Robert Bosch Center for Power Electronics at Reutlingen University, Germany. Since April 2017, he has been heading the Chair for Mixed-Signal IC Design at Leibniz University Hannover, Germany. His research interest includes IC design with focus on power management, gate drivers and high-voltage design. Dr. Wicht was co-recipient of the 2015 ESSCIRC Best Paper Award. He invented fourteen patents with several more pending. Dr. Wicht is IEEE Senior Member. He also serves as a member of the Technical Program Committee of the European Solid-State Circuits Conference (ESSCIRC) and of the International Solid-State Circuits Conference (ISSCC). He received the 2018 faculty award for excellent teaching.

Frerik Witte received his M.Sc. degree in electrical engineering (cum laude) from Delft University of Technology in 2003. The subject of his M.Sc. thesis was “On-Chip Time References and Electro-Thermal Oscillators”. In 2003, he started working towards a Ph.D. degree at the Electronic Instrumentation Laboratory of Delft University of Technology. He specialized in precision operational and instrumentation amplifiers. From January to April 2003, he did an internship at Philips Semiconductors automotive business line, San Jose, California. In 2009 he joined National Semiconductor which was acquired by Texas Instruments. In 2011, he joined Texas Instruments at Delft. In 2016 Texas Instruments stopped its activity in Delft and he joined Catena in Delft. In 2019 he joined XSens, and now works on projects for Memsic. Currently he designs circuits for motion sensors. He received the ESSCIRC 2006 Young Scientist Award. He published 7 international peer-reviewed papers, holds 3 US patents and published a book on “Dynamic Offset Compensated CMOS Amplifiers” with Springer Science+Business Media.