Delta-Sigma Data Converters

    June 29 – July 3, 2020

    Registration deadline: May 22, 2020
    Payment deadline: June 15, 2020

    registration
    Course material will be distributed only if fees have been paid by the deadline for payment.

    MONDAY, June 29

    8:30-12:00 pm Delta Sigma Converter Basics, Parts A & B Shanthi Pavan
    1:30-5:00 pm Delta Sigma Converter Basics, Parts C & D Shanthi Pavan

    TUESDAY, June 30

    8:30-10:00 am Delta Sigma Converter Basics, Part E Shanthi Pavan
    10:30-12:00 pm High-Level Design of CTDS Modulators Shanthi Pavan
    1:30-5:00 pm Non-Idealities in CTDS Modulators Shanthi Pavan

    WEDNESDAY, July 1

    8:30-10:00 am Design of Building Blocks for CTDS Modulators Shanthi Pavan
    10:30-12:00 pm Systematic Design Centerning of a Practical
    CTDS Modulators
    Shanthi Pavan
    1:30-3:00 pm Circuit Techniques to Mitigate Flicker Noise in
    CTDS Modulators
    Shanthi Pavan
    3:30-5:00 pm Dynamic Element Matching (Part 1) Ian Galton

    THURSDAY, July 2

    8:30-10:00 am Dynamic Element Matching (Part 2) Ian Galton
    10:30-12:00 pm VCO-Based Delta Sigma ADCs Ian Galton
    1:30-3:00 pm Discrete-Time Delta-Sigma Design David Johns
    3:30-5:00 pm Introduction to the Delta-Sigma Toolbox David Johns

    FRIDAY, July 3

    8:30-10:00 am Bandpass Delta-Sigma ADCs David Johns
    10:30-12:00 pm Incremental and Sensor ADCs David Johns
    1:30-3:00 pm Circuit Noise Issues with ADCs David Johns
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    Abstracts

    Delta-Sigma Data Converters
    June 29 – July 3, 2020
    EPFL Premises, Lausanne, Switzerland

    Delta Sigma Converter Basics, Parts A & B
    Shanthi Pavan, Indian Institute of Technology

    Review of quantization noise, oversampling and noise shaping. Signal dependent stability, fundamental tradeoffs in DS modulators – maximum stable amplitude and noise shaping.  Simulation techniques for Delta-Sigma Modulators.

    Delta Sigma Converter Basics, Parts C, D & E
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    High-Level Design of Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Systematic design of Continuous-Time Delta-Sigma Modulators from the DT prototype using z-transform and state space methods. The “method of moments” approach to design and intuitive understanding of Continuous-Time Delta-Sigma Modulators.

    Non-idealities in Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Excess loop delay, and compensation techniques. Clock jitter and metastability. Clock jitter and metastability (contd). Mitigating effects of jitter in CTDSMs. Time constant variations. Loop filter nonlinearity.

    Design of Building Blocks for Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    Systematic Design Centering a Practical Continuous-Time Delta-Sigma Modulator
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    Circuit Techniques to Mitigate Flicker Noise in Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    Dynamic Element Matching (Part 1)
    Ian Galton, UC San Diego

    Randomization and element rotation techniques. Tree structured mismatch shaping.

    Dynamic Element Matching (Part 2)
    Ian Galton, UC San Diego

    This lecture will explain dynamic element matching (DEM) techniques in general and mismatch-noise shaping DEM in particular. Topics include qualitative and quantitative explanations of how error from component mismatches is spectrally shaped without knowledge of the mismatches, DEM DAC topologies and their limitations, DEM encoder algorithms and implementations, and the fundamental performance tradeoffs that govern all types of DEM.

    VCO-Based Delta-Sigma ADCs
    Ian Galton, UC San Diego

    ADCs based on ring oscillator voltage controlled oscillators (VCOs) enabled by digital calibration have the functionality of conventional continuous-time delta-sigma ADCs, but without the need for analog integrators, feedback DACs, comparators, reference voltages, or low-jitter clocks. Therefore, they use much less area than comparable conventional delta-sigma ADCs, are well-suited to advanced CMOS technology, and can easily support reconfigurability. This lecture will describe the principles of VCO-based ADCs, their limitations, techniques such as digital calibration for addressing their limitations, and will present case studies of example IC implementations.

    Discrete-Time Delta-Sigma Design
    David Johns, University of Toronto

    This talk will discuss the design of switched-capacitor delta sigma design. The basics of switched-capacitor circuits will be presented as well as circuit approaches to overcome limitations. In addition, the design of delta sigma converters using switched capacitor circuits will be discussed with the use of an example design.

    Introduction to the Delta-Sigma Toolbox
    David Johns, University of Toronto

    This talk will give an introduction to the use of a Matlab toolbox called the ³Delta Sigma Toolbox². Extensive examples will be given as well as how to make use of state-space to use different filter topologies as well as dynamic range scaling.

    Bandpass Delta-Sigma ADCs
    David Johns, University of Toronto

    This talk will discuss the design of Bandpass Delta Sigma ADCs which are useful in RF systems. Topics covered include resonator structures, architecture choices and example systems.

    Incremental and Sensor ADCs
    David Johns, University of Toronto

    This talk will discuss the design of incremental ADCs as well as low-frequency sensor data converters. These goal of these converters are to not only have high linearity and SNR but also to have low offset and high accuracy.

    Circuit Noise Issues with ADCs
    David Johns, University of Toronto

    This talk will discuss noise in basic circuits and opamps as well as a simple switched-C integrator as they apply to data converters. Topics covered include device noise basics, amplifier/cascode/mirror/diff-pair noise, switched-C noise, and oversampling.

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