Category Archives: TUDelft – The Netherlands


    Sensors and CMOS Interface Electronics

    On-Line Class
    CET – Central European Time Zone

    Download One-Page Schedule Here

    Week 1: May 6-9, 2025

    Week 2: May 14-16, 2025

    Registration deadline: April 21, 2025
    Payment deadline: April 25, 2025

    registration

    RECOMMENDED BOOKS

    G. Meijer (ed.), Smart Sensor Systems, Wiley, 2008
    G. Meijer, K. Makinwa and M. Pertijs (eds.), Smart Sensor Systems: Emerging Technologies and Applications, Wiley, 2014

    TEACHING HOURS

    DAILY Central European Time CET Eastern Standard Time EST Pacific Standard Time PST India Standard Time IST
    Module 1 3:00-4:30 pm 9:00-10:30 am 6:00-7:30 am 6:30-8:00 pm
    Module 2 5:00-6:30 pm 11:00-12:30 am 8:00-9:30 am 8:30-10:00 pm

    WEEK 1: May 6-9

    Tuesday, May 6

    3:00-3:15 Introduction to the Course Programme K.A.A. Makinwa
    M.A.P. Pertijs
    3:15-4:30 Designing Smart Sensor Systems K. A.A. Makinwa
    5:00-6:30 Measurement and Calibration Techniques M.A.P. Pertijs

    Wednesday, May 7

    3:00-4:30 Dynamic Offset-Cancellation Techniques K.A.A. Makinwa
    5:00-6:30 Precision Operational and Instrumentation Amplifiers M.A.P. Pertijs

    Thursday, May 8

    3:00-4:30 Physical‐to‐Digital Conversion M.A.P. Pertijs
    5:00-6:30 References for Smart Sensors F. Sebastiano

    Friday, May 9

    3:00-4:30 Smart Temperature Sensors K.A.A. Makinwa
    5:00-6:30 Smart Inertial Sensors M. Kraft

    WEEK 2: May 14-16

    Wednesday, May 14

    3:00-4:30 CMOS Image Sensors A.J.P. Theuwissen
    5:00-6:30 Single-Photon Imagers R. Henderson

    Thursday, May 15

    3:00-4:30 Smart Magnetic Field Sensors G. Close
    5:00-6:30 Smart Ultrasonic Sensors M.A.P. Pertijs

    Friday, March 16

    3:00-4:30 Interface Techniques for Smart Bioelectronic T. Denison
    5:00-6:30 Power Solutions for Autonomous Sensors S. Du
    6:30-6:45 Closing Session K.A.A. Makinwa
    M.A.P. Pertijs
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    Abstracts

    Sensors and CMOS Interface Electronics
    On-Line Class, May 6-16, 2025

    Designing Smart Sensor Systems
    Kofi Makinwa, TU Delft, the Netherlands

    Smart Sensor Systems are systems in which sensors and dedicated interface electronics are integrated on the same chip, or at least in the same package. The design of such sensors requires a multidisciplinary approach that takes the characteristics and requirements of the whole system into account. The interface electronics needs to be designed in such a way that it does not limit sensor performance. Since sensors are often relatively slow, the necessary precision can often be achieved by the use of dynamic techniques such as chopping, auto-zeroing and dynamic element matching. As an example, the design of a state-of-the-art wind sensor will be described.

    Measurement and Calibration Techniques
    Michiel A.P. Pertijs, TU Delft, the Netherlands

    This lecture discusses the basics of measurement and calibration. Calibration procedures are essential for establishing the accuracy of a sensor in relation to standards. The lecture discusses how smart sensors differ from conventional sensors in how they are calibrated and how they are used after calibration. Various calibration techniques are introduced, as well as various trimming and correction techniques that can be used to adjust smart sensors after calibration. The lecture also explores the possibility of realizing self-calibrating smart sensors. Various forms of self-calibration are discussed, including the co-integration of additional sensors to compensate for cross-sensitivity, and the co-integration of an actuator to generate a calibration signal locally. Three case studies, of a smart temperature sensor, a smart wind sensor and a self-calibrating Hall sensor, are included to illustrate the various concepts.

    Dynamic Offset-Cancellation Techniques
    Kofi Makinwa, TU Delft, the Netherlands

    In modern CMOS processes, device mismatch typically results in offset voltages of several millivolts. But many sensor interfaces require much lower offset levels. By using dynamic offset cancellation techniques such as auto-zeroing and chopping, however, microvolt levels of offset can be routinely achieved. In this lecture, an introduction to the theory of auto-zeroing and chopping will be given, and the pros and cons of both techniques will be discussed. Examples will be given of the use of auto-zeroing and chopping in sensor interfaces with residual offsets as low as 50nV.

    Precision Operational and Instrumentation Amplifiers
    Michiel A.P. Pertijs, TU Delft, the Netherlands

    To understand the problems of the designers of sensor interface circuits will help the system designer to get the best performance. The principles and features of precision instrumentation amplifiers, key building blocks of many sensor interfaces, will be discussed from a designer’s point of view. Constraints regarding noise, dynamic range, common-mode range will be discussed for circuits made in state-of-the art technology. The case studies include instrumentation amplifiers with offset cancellation, and amplifiers with rail-to-rail voltage ranges.

    Physical-to-Digital Conversion
    Michiel A.P. Pertijs, TU Delft, the Netherlands

    Modern electronic systems employ increasing numbers of sensors to gather information about the physical world around us. This information, which is inherently non-electrical and analog in nature, needs to be digitized, often with increasingly demanding requirements on accuracy and power efficiency. This lecture presents an integral approach to designing suitable physical-to-digital converters that goes beyond the conventional approach of combining of a sensor, front-end circuit and ADC in terms of accuracy and efficiency. Different data-converter architectures suitable for sensing applications, including successive-approximation and delta-sigma modulation, are discussed. Approaches for embedding sensors into data-converter architectures are presented, including ratiometric charge-balancing architectures. These concepts are illustrated using case studies of state-of-the-art temperature-to-digital, humidity-to-digital, and light-to-digital converters.

    References for Smart Sensors
    Fabio Sebastiano, TU Delft, The Netherlands

    Although often neglected, a reference is always required for any measurements, since measuring basically involves comparing the physical parameter of interest to a known quantity. Consequently, it is a fundamental component in any smart sensor, which can even limit the performance of the whole system if not properly designed. In this lecture, an overview of references for smart sensors will be given with specific focus on references that can be implemented on chip in a standard CMOS process. An overview of references available in CMOS will be presented, including resistance, capacitive, voltage, current and frequency references. We will discuss the need for references in smart sensors and their requirements, and explore through practical examples and case studies how the performance of integrated references can meet those requirements.

    Smart Temperature Sensors
    Kofi Makinwa, TU Delft, the Netherlands

    Smart temperature sensors are everywhere! They are used in CPUs for thermal management, in DRAMs to control refresh rates, and in MEMS frequency references for temperature compensation, to name but a few high volume applications. In this lecture, the operating principles of smart temperature sensors will be explained, their main sources of inaccuracy identified, and suitable remedies, at the device, circuit and system levels, described. To further illustrate these concepts, the design of state-of-the-art temperature sensors with inaccuracies in the order of 0.1°C will be presented.

    Smart Inertial Sensors
    Michael Kraft, KU Leuven, Belgium

    Accelerometers and gyroscopes are one of the most successful MEMS sensors. The lecture will briefly present their underlying principles, and then focus on the state-of-the-art as there is still considerable effort going on to increase their performance and functionality. Key to high performance is the inclusion of micromachined sensing element in a force-feedback, closed loop control system. The approach based on electro-mechanical sigma-delta modulator has proven to be very successful in recent years. Such a control system yields a digital output enabling the digital processing of the sensors’ output, hence allowing the design of smart inertial sensors.

    CMOS Image Sensor
    Albert Theuwissen, Harvest Imaging, the Netherlands

    Today, image sensors are present in a wide variety of applications, such as picture taking, video capture, medical imaging, scientific instrumentation and machine vision. Image sensors are used as one of the key input devices for highly automated systems, such as self driving cars or order picking robots. Most image sensors are built in CMOS technology, because it allows to optimize the image sensor for the required specifications and to implement the required functionality in a power- and cost-efficient way. This presentation will give an overview of CMOS image sensors and pixels, readout circuit architectures, manufacturing technologies and key image sensor specifications. New applications are demanding specific requirements to the image sensor, of which some examples will be elaborated.

    Single-Photon Imagers
    Robert Henderson, University of Edinburgh

    Imaging at the quantum limit of light has become possible thanks to Single Photon Avalanche Diodes (SPADs) in CMOS technology. These devices capture individual photons with picosecond timing resolution enabling digital image processing based on-chip statistical processing of events. SPADs have enabled mass-market 3D imaging products using the direct time-of flight (dToF) principle at both short-medium range for consumer mobile, and long range LIDAR for automotive and industrial applications. Advances of SPAD performance through 3D-stacking are allowing them to tackle even the most challenging low light photon counting, scientific, biomedical and radiation imaging problems. This lecture will allow the designer to make suitable choices of SPAD process, performance metrics, interfaces, efficient timing and digital signal processing circuits for each of the applications. The challenging issues of designing large SPAD arrays for small pixel area, low power consumption, uniform system timing, clock distribution and fast gating will be addressed. Sensor architectures for front-side and 3D-stacked backside illuminated process technologies will be reviewed.

    Smart Magnetic Field Sensors
    Gael Close, Melexis, Switzerland

    Magnetic sensors perform ubiquitous functions such as position sensing in mechatronic systems (e.g. valve, pedal, brake in automobile) and current sensing in electrical machines. They contribute $2+ Billion to the semiconductor economy. The market is still growing, fueled by the constant need for energy efficiency, safety and comfort in automobile applications. Emerging applications such magnetic skin in robotics are fueling innovation. Consequently, the design of magnetic sensors remains an active area of research and development. The implementation in CMOS integrated circuits enables the integration of smart mixed-signal features (such as sensor error calibration/correction, multi-sensor system, built-in diagnostics…) into mass-manufacturable chip. This lecture will start with a review of the market and applications trends. A deep dive into the dominant technology (Hall-based magnetic sensors) and the mixed-signal readout considerations will be provided. A case study will be presented to illustrate a real-world circuit design, realization and achieved accuracy. The lecture will conclude with a brief overview of the alternative magnetic technologies (e.g. fluxgate, AMR) and a benchmark capturing the state of the art and the main trade-offs.

    Smart Ultrasonic Sensors
    Michiel A.P. Pertijs, TU Delft, the Netherlands

    Acoustic waves can be used to perform a wide variety of measurements, such as flow sensing, ranging and medical imaging. This lecture first introduces the basic operating principles of acoustic sensors and then focuses on the opportunities opened up by combining transducers and integrated electronics to form smart acoustic sensors. This combination is key for the realization of ultrasonic devices that employ transducer arrays with large numbers of elements, e.g. for 3D medical imaging, and for miniaturized, low-power devices. The basic operating principles of piezo-electric and capacitive ultrasound transducers and key interface circuits such as LNAs, pulsers and beamformers will be discussed. A miniature ultrasound probe for 3D medical imaging will presented as a case study.

    Interface Techniques for Smart Bioelectronic
    Tim Denison, Medtronic Neuromodulation, USA

    The use of physiological sensors is a key enabling technology for implementing ‘smart’ implantable systems. For example, electrocardiograms (ECG) are well established for measuring the intrinsic activity of the heart, and algorithms based on the ECG help to initiate stimulation therapy in the presence of an abnormal beat in modern pacemakers. The role of physiological sensing continues to grow as technology evolves and can be applied to resolving unmet clinical needs. The practical implementation of chronic physiological sensors presents numerous challenges. In particular, sensors that go in the body have strict requirements on reliability, stability and safety. Additional challenges arise with the constraints placed on an implantable design. These constraints include low supply overhead and limited current drain, as chronic sensors must often limit their power dissipation to microwatt levels in order to have acceptable implant longevity. This tutorial will highlight recent physiological smart sensor prototypes that provide robust performance within the constraint of an implantable system. Case studies will include “reflex concepts” implemented with accelerometers, as well as prototype seizure monitors and prosthetic brain-machine interface technologies utilizing precision chopper amplifiers.

    Power Solutions for Autonomous Sensors
    Sijun Du, TU Delft, the Netherlands

    All electronic devices need power to operate, as well as smart sensors. Compared with other electronics, smart sensors are implemented ubiquitously; and some are even implemented in places hard to be reached again, such as Internet-of-Things (IoT) sensors and implantable sensors. Due to the enormous number of these sensors, replacing batteries becomes a very time-consuming, costly, and sometimes impossible, task. In this lecture, power solutions for smart sensors are discussed. The lecture first introduces the methodologies to design power solutions starting from the applications and power budgets. Various power solutions are then discussed, including energy harvesting techniques from different energy sources and wireless power transfer (WPT) techniques with different energy types. A number of key design considerations are also discussed to achieve high energy efficiency in rapidly changing conditions, reliability in harsh environments and system miniaturizations. A few prototypes and real-world implementations on fully self-sustained smart sensors will be presented.

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    TU Delft On-Line Registration Form

    Special conditions
    Special contitions apply for PhD students. Please see conditions on this link before registering: PhD students conditions
    No other discounts will be granted.
    On receipt of your registration (or Purchase Order) a confirmation email is sent together with the invoice. Available payment methods are credit card payment through PayPal, or bank transfer.
    Please wait for the course to be formally confirmed before making your payment.
    BEFORE signing up, please read the cancellation policy!

      Please select the course you would like to attend, and fill the form below.

      Sensors and CMOS Interface Electronics, On-Line Class, May 5-16, 2025

      Sensors and CMOS Interface Electronics, Full Rate

      CHF 1'600.-

      Sensors and CMOS Interface Electronics, PhD Student Rate

      CHF 800.-

      Deadline for Registration: April 21, 2025
      Payment Due: April 25, 2025

      Operational Amplifiers: Theory and Design, On-Line Class, November 3 to 14, 2025

      It is recommended to buy the book "Operational Amplifiers, Theory and Design", Third Edition, Johan Huijsing, 2017 Springer International Publishing, to follow the course.

      Operational Amplifiers, Full Rate

      CHF 1'800.-

      Operational Amplifiers, PhD Student Rate

      CHF 900.-

      Deadline for Registration: October 20, 2025
      Payment Due: October 24, 2025

      For PhD students Only:

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      BEFORE PAYING: Please submit your registration and wait for confirmation and invoice.
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      PHD STUDENTS & ECTS CREDITS

      Special financial conditions are offered to PhD (or Master) students who provide an official PhD (or Master) registration certificate from their university.

      CHF 800.- for the Sensors and CMOS Interface Electronics class, and
      CHF 900.- for the Operational Amplifiers class.

      No further discount applies.

      For European students, a 10-day course (28.5 to 30 hours) may be eligible for 3 ECTS credits, provided these are accredited by your university and/or PhD advisor.

      Obtention of the ECTS credits is subject to passing an exam with success. You will have to make a small report which deals with the application of the course followed, relating to the problem of your thesis.

      If you wish to pass this exam, you imperatively have to mention it on the on-line registration form, at the same time you register. The credit(s) attestation will be sent to you by post after the exam.

      PAYMENT INFORMATION

      Payment of the fee should reach the course organization by the below indicated deadlines. However, we kindly ask you not to pay the course fees before MEAD’s formal confirmation.

      Payment due :

      – Sensors and CMOS Interface Electronics: April 25, 2025
      – Operational Amplifiers: October 24, 2025

      There are two possibilities for the payment:
      1) Payment by bank transfer.
      Account number and bank information are mentioned on the invoice.
      Please mention participant’s name and/or invoice number.

      2) Payment by credit card through PayPal or credit card checkout.

      Cancellation policy

      Fees will be fully refunded if a cancellation is received by the payment deadline. No refund will be issued for cancellation notices received after this date. Registration fees may be transferred to an alternative attendee or used to pay for participation in a future MEAD course. Unpaid registrants are responsible for fees unless a cancellation is received by the deadline for payment. All reimbursement will incur a 10% fee per course. The course schedules shown contains the best information available to MEAD and/or TU Delft at the time of the web page update. MEAD and/or TU Delft reserve the right to make changes in the schedule due to illness of the instructors or other unavoidable circumstances.


      Operational Amplifiers: Theory and Design

      On-Line Class
      CET – Central European Time Zone

      Download One-Page Schedule Here

      Week 1: November 3-7, 2025

      Week 2: November 10-14, 2025

      Registration deadline: October 17, 2025
      Payment deadline: October 24, 2025

      registration

      It is recommended to buy the book “Operational Amplifiers, Theory and Design“, Third Edition, Johan Huijsing, 2017 Springer International Publishing, to follow the course.

      TEACHING HOURS

      Central European Time CET
      (Lausanne)
      Eastern Standard Time EST
      (New York)
      Pacific Standard Time PST
      (California)
      India Standard Time IST (India)
      Daily Schedule 3:00-6:30 pm 9:00-12:30 am 6:00-9:30 am 7:30-11:00 pm

      WEEK 1: November 3-7

      Monday, November 3

      3:00-4:00 pm Introduction / Definitions / Macromodels J.F. Witte
      4:15-5:15 pm Precision Applications / Dynamic Range J.F. Witte
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / J.F. Witte

      Tuesday, November 4

      3:00-4:00 pm Input Stages: Offset, Noise, CMRR R. Hogervorst
      4:15-5:15 pm Rail-to-Rail Capability R. Hogervorst
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / R. Hogervorst

      Wednesday, November 5

      3:00-4:00 pm Output Stages: Voltage and Current Efficiency J.H. Huisjing
      4:15-5:15 pm Class-AB Biasing J.H. Huisjing
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / J.H. Huisjing

      Thursday, November 6

      3:00-4:00 pm Frequency Compensation, Slew-Rate R.G.H. Eschauzier
      4:15-5:15 pm Non-linear Distortion R.G.H. Eschauzier
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / R.G.H. Eschauzier

      Friday, November 7

      3:00-4:00 pm Two-Stage Configurations K.J. de Langen
      4:15-5:15 pm Three-Stage Configurations K.J. de Langen
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / K.J. de Langen

      WEEK 2: November 10-14

      Monday, November 10

      3:00-4:00 pm Three-Stage Configurations K.J. de Langen
      4:15-5:15 pm Three-Stage Configurations K.J. de Langen
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / K.J. de Langen

      Tuesday, November 11

      3:00-4:00 pm Four-Stage Configurations K.J. de Langen
      4:15-5:15 pm Fully Differential OpAmps K.J. de Langen
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / K.J. de Langen

      Wednesday, November 12

      3:00-4:30 pm Dynamic Offset Compensation: Auto-Zeroing J.F. Witte
      4:15-5:15 pm Low­-Offset Chopper Amplifiers J.F. Witte
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / J.F. Witte

      Thursday, November 13

      3:00-4:00 pm Auto-Zero and Chopper Amplifiers Overview J.H. Huisjing
      4:15-5:15 pm Auto-Zero and Chopper Amplifiers Overview J.H. Huisjing
      5:30-6:30 pm Hands-on Simulations / Questions & Answers S. Javvaji / J.H. Huisjing

      Friday, November 14

      3:00-4:00 pm Capacitive – Coupled Amplifiers Q. Fan
      4:15-4:45 pm Capacitive – Coupled Amplifiers Q. Fan
      5:00-6:00 pm Evaluation
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      Abstracts

      Operational Amplifiers: Theory and Design
      On-Line Class
      November 3-14, 2025

      Definitions. Equivalent Circuits and Macromodels. Precision Applications.

      The introductory part will cover general opamp aspects. Firstly, four different types of opamps will be defined on the basis of the grounding scheme of the input and output port. Secondly, macromodels, equivalent circuits and chain matrices of the above four opamp types will be given. Thirdly, a number of characteristic applications will be described. A systematic way to relate the application specifications to the opamp specifications will be presented.

      Input Stages. Offset, Noise. CMRR, Rail-to-Rail Capability.

      The input stage of an operational amplifier has to amplify differential signals and reject common-mode signals. Other design specifications for an input stage are low offset, low noise and low distortion, etc. This course discusses techniques and design considerations which can be used to obtain high-performance input stages. In low-voltage applications it is sometimes necessary to have a common-mode input range which extends from rail to rail. Particularly, this is needed in buffer applications which require a high signal-to-noise ratio. In this case a complementary input stage can be used. One of the problems of this type of input stage is that its gm varies over the common-mode input range which blocks an optimal frequency compensation. Several techniques to keep the gm of a complementary input stage constant will be discussed.

      Output Stages. Voltage and Current Efficiency. Class-AB Biasing.

      This section explains the design of output stages with a high power efficiency. It will be shown that, besides the conventional feedforward class AB biasing, feedback class AB biasing can be applied with many interesting advantages, such as ultra low supply voltage. Several saturation protection and current limitation circuits are shown for bipolar output transistors.

      Overall Design. Nine Topologies, Frequency Compensation.
      Slew-Rate, Non-linear Distortion.

      This part of the course will introduce nine overall operational amplifier topologies. It will discuss the basic properties of each topology, focusing on such parameters as gain and bandwidth, but also whether a topology is suited for low power. Based on the nine topologies, we will have a look at frequency compensation strategies for achieving sufficient gain and phase margin. For amplifiers with two gain stages these techniques include so called parallel compensation and Miller compensation. For amplifiers with three stages and more, the course will cover techniques like Nested Miller compensation, Multipath Nested Miller compensation and Hybrid Nested Miller compensation. We will also investigate techniques for avoiding the so called right-half-plane zero that occurs in Miller compensated amplifiers. Finally, this section will touch on slew rate limitations and non-linearity of the active components. We will see that both effects are causes for non-linear distortion and how using the right frequency compensation technique can help improve the performance.

      Two-Stage Configurations. Three-Stage Configurations.
      Four-Stage Configurations.

      These three sessions explain the design of realization examples of each of the nine overall opamp topologies. Many prominent opamp designs are covered. The opamps are differentiated according to the types of stages they are composed of, such as a general amplifier (GA) built with a differential pair or a stage having the emitters or sources connected to ground or one of the supply rails, a current follower (CF) or current mirror stage, a voltage follower (VF) stage or a compound stage (VF/GA). Feasible are two two-stage amplifiers, six three-stage amplifiers and one four-stage amplifier. In this manner all opamps are ordered in a framework which clearly depicts their related or different specifications.

      Fully Differential OpAmps.

      This section describes a number of fully differential opamp types. The issue of common mode feedback is covered with each type.

      Low-Offset Chopper and Instrumentation Amplifiers.

      This section gives an overview of techniques that achieve low-offset, low-noise, and high accuracy in CMOS operational amplifiers (OA or OpAmp) and instrumentation amplifiers (IA or InstAmp). Auto-zero and chopper techniques are used apart and in combination with each other. Frequency-compensation techniques are shown that obtain straight roll-off amplitude characteristics in the multi-path architectures of chopper stabilized amplifiers. Therefore, these amplifiers can be used in standard feedback networks. Offset voltages lower than 1µV can be achieved.

      Capacitive Coupled Amplifiers

      This lecture introduces capacitive-coupled amplifiers which are used in applications interfacing high input CM voltages. Signal transfer through on-chip metal–oxide–metal capacitors are explained with design examples.

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