Advanced Analog Circuit Design

    On-Line Class
    PST – California Time Zone

    Download One-Page Schedule Here

    July 13-16, 2020

    Registration deadline: June 17, 2020
    Payment deadline: June 27, 2020

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    TEACHING HOURS

    DAILY Pacific Standard Time PST Eastern Standard Time EST Central European Time CET India Standard Time IST
    Module 1 9:00-10:30 am 12:00-1:30 pm 6:00-7:30 pm 9:30-11:00 pm
    Module 2 11:00 am-12:30 pm 2:00-3:30 pm 8:00-9:30 pm 11:30 pm-1:00 am
    Module 3 2:00-3:30 pm 5:00-6:30 pm 11:00 pm-12:30 am 2:30-4:00 am
    Module 4 4:00-5:30 pm 7:00-8:30 pm 1:00-2:30 am 4:30-6:00 am

    MONDAY, July 13 – PST Time Zone

    9:00-10:30 am Opamp Stability and Optimization David Johns
    11:00 am-12:30 pm
    & 2:00-3:30 pm
    Low Power OpAmp Design and Biasing David Johns
    4:00-5:30 pm Circuit Noise Limitations David Johns

    TUESDAY, July 14 – PST Time Zone

    9:00 am-12:30 pm Continuous-Time Filters Boris Murmann
    2:00-3:30 pm CMOS Switched-Capacitor Circuit Design Boris Murmann
    4:00-5:30 pm Offset and 1/f Noise Reduction Techniques Boris Murmann

    WEDNESDAY, July 15 – PST Time Zone

    9:00 am-12:30 pm Gm/ID-based Design of Amplifier Circuits Boris Murmann
    2:00-5:30 pm Time Assisted Analog Design Pavan Hanumolu

    THURSDAY, July 16 – PST Time Zone

    9:00-10:30 pm Practical Techniques of Frequency Compensation Vadim Ivanov
    11:00 am-12:30 pm Voltage References Vadim Ivanov
    2:00-5:30 pm Circuit Techniques for OpAmp Speed and
    Accuracy Improvements
    Vadim Ivanov
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    Abstracts

    Advanced Analog Circuit Design
    July 13-16, 2020
    On-Line Class, PST – California Time Zone

    Opamp Stability and Optimization
    David Johns, University of Toronto

    This talk will discuss stability as it relates to small and larger circuits. Topics covered include loop-gain/poles relationship, return-ratio, blackman-impedance, pole-splitting, dealing with positive zero, and nested-miller compensation.

    Low Power OpAmp Design and Biasing
    David Johns, University of Toronto

    This talk will discuss opamp design with an emphasis on low power and biasing approaches. Topics covered include weak/strong-inversion biasing, constant-current/PTAT/constant-Gm biasing, differential, two/single-stage/multistage opamps, common-mode feedback and negative resistors.

    Circuit Noise Limitations
    David Johns, University of Toronto

    Design strategies for reducing noise with emphasis on a product hardware example. Noise prevention techniques, noise reduction techniques, and noise rejection techniques. Actual hardware experiences along with techniques, methodologies, and strategies for analog mixed-signal noise reduction.

    Continuous-Time Filters
    Boris Murmann, Stanford University

    Continuous-time filters play an important role in many communication systems and at the data conversion interface, where they are required for anti-aliasing and reconstruction. This module begins by reviewing the basic s-domain filter approximations and then looks into implementations strategies. We review active RC and gm-C topologies and study their imperfections and sensitivities to nonideal effects.

    CMOS Switched-Capacitor Circuit Design
    Boris Murmann, Stanford University

    Discrete-time signals, Laplace and z-transform; Basic building blocks (opamps, switches, capacitors); Sample-and-hold circuits; SC integrators, bilinear filters and and biquads; SC amplifiers; Correlated double sampling and chopper stabilization; Nonideal effects and their correction.

    Offset and 1/f Noise Reduction Techniques
    Boris Murmann, Stanford University

    The design of precision analog interfaces in CMOS is severely impaired by offset, offset drift and 1/f noise. The material covered in this module analyzes these impairments in detail and reviews the common solutions for their remedy: chopping, autozeroing, correlated double sampling and offset stabilization. We will discuss the residual nonidealities as well as pros and cons of each technique and review typical application examples. In addition, we will survey recent advances in the state-of-the-art.

    Gm/ID-based Design of Amplifier Circuits
    Boris Murmann, Stanford University

    The majority of textbook material on CMOS analog circuit design is based on the square-law model. While this model remains useful for teaching, it has become too inaccurate for design in nano-scale CMOS. This module presents a systematic design methodology that bridges this gap using Spice-generated look-up tables. We interpret these data based on the transistor’s inversion level, employing gm/ID as a proxy and key parameter for design. With the inclusion of other width-independent figures of merit (gm/Cgg, gm/gds, etc.), this allows us to study the tradeoffs between bandwidth, noise, distortion and power dissipation in a normalized space. Since this entire flow is driven by Spice data, we maintain close agreement between the desired specs and the circuit’s simulated performance. The presented material will detail the inner workings of this approach and illustrate it using two amplifier design examples (folded cascode and two-stage OTA).

    Time Assisted Analog Design
    Pavan K. Hanumolu, University of Illinois

    Time-based signal processing is emerging as a viable alternative to analog signal processing traditionally performed in voltage, current, or charge domains. This tutorial discusses time-based techniques to implement classical analog functions such as filtering, control and data conversion. Time-based circuits using voltage controlled ring oscillators will be presented and their design tradeoffs will be elucidated with the aid of circuit design examples.

    Practical Techniques of Frequency Compensation
    Vadim Ivanov, Texas Instruments

    Every analog IC comprises multiple feedback loops. Interaction between these loops makes frequency compensation of such system non-trivial task, unsupported by the general control theory. Every MOS or bipolar transistor is nonlinear, which may cause conditional stability and complicate compensation.
    We will consider system structure design for stability, needed for it elementary circuit cells additional to the textbook techniques, as well as ways to achieve unconditional system stability when component parameters vary, and when load and signal source impedance is not well defined. Examples include LDOs stable with any load capacitance, transconductors with wide (few volts) input voltage range, and multistage operational amplifiers.

    Bandgap Voltage References
    Vadim Ivanov, Texas Instruments

    Discussed are error sources of the bandgap voltage references and techniques for improving their accuracy: circuit techniques for low-noise bandgap generation core, feedback amplifier with chopping offset elimination, output buffer with mOhm output impedance and fast settling on load changes; single- dual and triple temperature trimming; packaging requirements; testing and application particulars. Also presented circuit solutions for reverse bandgap reference, operational from 0.9V supply, and reference structure and implementations with nanoampere consumption.

    Circuit Techniques for OpAmp Speed and Accuracy Improvement
    Vadim Ivanov, Texas Instruments

    Presented is a top down design process of the OpAmps based on the structural design methodology. We will start from selection of the gain structure, followed by the implementations of gain structures as well as gradual addition of various specific functions like PSRR/CMRR improvement, slew enhancement, overload recovery. We will consider offset improvement by trimming as well as by auto-zeroing and chopping, high-and low-voltage design specifics. Most of the circuits solutions were not published before and have been used in recent industrial ICs. Yet it is not another cookbook with analog circuit recipes. The goal of this presentation is to arm the engineers with a tool helping to invent the solution for any analog design problem and, at the same time, be reasonably sure that this solution is one of the best possible for any given process and set of constraints.

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