Low-Power Analog IC Design

    June 26-30, 2017
    Deadline for registration: May 23, 2017
    registration

    Course material will be distributed only if fees have been paid by the deadline for payment.

    MONDAY, June 26

    8:30-12:00 am MOS Transistor Modeling for Low-Voltage and Low-Power Circuit Design Christian Enz
    1:30-3:00 pm Basic Low-Power, Low-Voltage Circuit Techniques Willy Sansen
    3:30-5:00 pm Differential Amplifying Blocks with Positive Feedback Willy Sansen

    TUESDAY, June 27

    8:30-10:00 am Noise Performance of Elementary Transistor Stages Willy Sansen
    10:30-12:00 am Stability of Operational Amplifiers Willy Sansen
    1:30-3:00 pm Systematic Design of Low-Power Operational Amplifiers Willy Sansen
    3:30-5:00 pm Important Opamp Configurations Willy Sansen

    WEDNESDAY, June 28

    8:30-12:00 am Micropower ADCs Kofi Makinwa
    1:30-3:00 pm Important Opamp Configurations Willy Sansen
    3:30-5:00 pm Bandgap and Current Reference Circuits Willy Sansen

    THURSDAY, June 29

    8:30-12:00 am Matching of MOS Transistors in Deep-Submicron Marcel Pelgrom
    1:30-3:00 pm Distortion in Elementary Transistor Circuits Willy Sansen
    3:30-5:00 pm Low-Power Continuous-Time Filters Willy Sansen

    FRIDAY, June 30

    8:30-10:00 am Layout Considerations in Mixed-Signal Circuit Design Marcel Pelgrom
    10:30-12:00 am
    & 1:30-3:00 pm
    Ultra-Low Voltage Analog Circuit Design Christian Enz
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    Abstracts

    Low-Power Analog IC Design
    June 26-30, 2017
    EPFL Premises, Lausanne, Switzerland

    MOS Transistor Modeling for Low-Voltage and Low-Power Circuit Design
    Christian Enz, EPFL

    Evolution of CMOS technologies: process scaling, low-voltage constraint. Basic long-channel static theory. Short- and narrow-channel effects. Quasi-static dynamic model. Thermal and flicker noise model. Parameter extraction. The EKV model and its use for LV and LP analog circuit design.

    Basic Low-Power, Low-Voltage Circuit Techniques
    Willy Sansen, KU Leuven

    Weak inversion and bipolar operation of MOS transistors. BiCMOS versus CMOS. Passive components and pseudo-resistive networks. Elementary building blocks operated at low supply voltage and/or low current: current mirrors, standard and special structures; differential pairs and linearization techniques; elementary voltage-gain cells, MOS- inverter amplifier. Low-voltage cascode and pseudo-cascode configurations. LP/LV current and voltage references. Translinear circuits and principle of log-domain filters.

    Differential Amplifying Blocks with Positive Feedback
    Willy Sansen, KU Leuven

    Practical designs are built up by means of differential pairs, current sources and two-transistor cascodes. They are analyzed in detailed followed by fully-differential voltage and current amplifiers. Positive feedback is added as well to enhance both the Gain and the Gain-Bandwidth. Design procedures are discussed in all regions of operations (from weak to strong inversion and velocity saturation).

    Noise Performance of Elementary Transistor Stages
    Willy Sansen, KU Leuven

    Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology.

    Stability of Operational Amplifiers
    Willy Sansen, KU Leuven

    Multistage operational amplifiers require compensation capacitances for stability. The conditions for stability are discussed for both two-stage and three-stage operational amplifiers. Techniques are given to avoid the positive zero and to realize minimum power consumption at the same time. Several design examples are worked out.

    Systematic Design of Low-Power Operational Amplifiers
    Willy Sansen, KU Leuven

    For low-power optimization, an operational amplifier can be designed for high speed and stability according to three different design procedures, all leading to the same final result. They will be discussed for a two- and three stage amplifier. The compromises with other specifications such as noise, input and output range will be discussed as well and illustrated for a number of often used configurations.

    Micropower ADCs
    Kofi Makinwa, TU Delft

    With the current trend towards increasingly autonomous systems, micropower ADCs have become critical components. In this presentation, the basic principles of micropower SAR and sigma-delta ADCs will be discussed. It will also be shown how these two proven techniques can be combined to realize high resolution micropower ADCs.

     

    Important Opamp Configurations
    Willy Sansen, KU Leuven

    Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology.

    Bandgap and Current Reference Circuits
    Willy Sansen, KU Leuven

    Voltage references are required in all ADC's. Current references are required for all biasing. Bandgap references in CMOS technologies are discussed. The compromises at low power consumption are highlighted. Realizations are presented of bandgap references down to 0.8 V supply voltage.

    Matching of MOS Transistors in Deep-Submicron
    Marcel Pelgrom, NXP Semiconductors

    Orders of magnitude. Offset: electrical, technological and timing aspects. Random matching: general description, application to MOS. Deep submicron CMOS matching considerations. Modeling and simulation of MOS transistor mismatch. Design examples. Packaging effects.

    Low-Power Continuous-Time Filters
    Willy Sansen, KU Leuven

    High-frequency filters are usually continuous-time type filters. They are simple in schematic and are able to handle large signals with low distortion. Moreover they need tuning circuits to be able to set the frequency and the quality factor. Most important filter schematics are reviewed and compared for high-frequency capability and power consumption.

    Distortion in Elementary Transistor Circuits
    Willy Sansen, KU Leuven

    For low supply voltage, a larger fraction of the total supply voltage has to be used, leading to more distortion. The several sources of nonlinear distortion are discussed for MOSTs and bipolar transistor, single-ended and differential. Also the role of feedback is examined in detail. All distortion mechanisms are analyzed in full operational amplifier configurations.

    Layout Considerations in Mixed-Signal Circuit Design
    Marcel Pelgrom, NXP Semiconductors

    After an introduction on elementary IC device characteristics and circuit analysis aspects (statistics, spread, fluctuations, parametric gradients), this lecture focusses on the two main attention areas of mixed-signal circuit layout, namely floorplan (design) related issues and technology related hazards. The floorplan design part discusses topics like cross-talk, clocks, power supply loops, guard rings, temperature gradients and design discipline. The technology part focuses on proximity and reticle effects, layout induced mechanical stress asymmetries, and common centroid layout solutions. The lecture finishes with a summary and a comprehensive set of “what if” guidelines.

    Ultra-Low Voltage Analog Circuit Design
    Christian Enz, EPFL

    The supply voltage of CMOS chips has constantly been scaled down in the last years to reach now the sub-1V region. This supply voltage reduction is mainly driven on one hand by the technology constraints to maintain a reasonable electric field within the MOS device to avoid high-field effects and on the other hand by the needs of digital circuits to reduce the dynamic power consumption. Analog circuits unfortunately don't take any advantage of this voltage down-scaling since almost all their performances are degraded and some basic circuits would even stop operating correctly. We will discuss the main challenges faced when designing analog circuits for ultra-low voltage (ULV) operation. We will first present the fundamental limits set by ULV, together with the technology limitations (such as matching) for analog circuits. We will then have a closer look at the MOS transistor operation with a particular focus on weak inversion, the Gm/ID characteristic and the inversion coefficient design approach. We then will review several basic building blocks capable of operating at ULV, including both continuous-time and sampled-data circuits. Finally we will investigate the potential of designing RF circuits in ULV taking advantage of ultra-deep submicron processes and give some design examples.

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