Delta-Sigma Data Converters

    March 26-30, 2018
    Deadline for registration: February 19, 2018
    registration

    Course material will be distributed only if fees have been paid by the deadline for payment.

    MONDAY, March 26

    8:30-12:00 am Delta Sigma Converter Basics, Parts A & B Shanthi Pavan
    1:30-5:00 pm Delta Sigma Converter Basics, Parts C & D Shanthi Pavan

    TUESDAY, March 27

    8:30-10:00 am Delta Sigma Converter Basics, Part E Shanthi Pavan
    10:00-12:00 am High-Level Design of CTDS Modulators Shanthi Pavan
    1:30-5:00 pm Non-Idealities in CTDS Modulators Shanthi Pavan

    WEDNESDAY, March 28

    8:30-10:00 am Discrete-Time Delta-Sigma Design David Johns
    10:30-12:00 am Introduction to the Delta-Sigma Toolbox David Johns
    1:30-3:00 pm Bandpass Delta-Sigma ADCs David Johns
    3:30-5:00 pm Circuit Noise Issues with ADCs David Johns

    THURSDAY, March 29

    8:30-12:00 am Dynamic Element Matching Ian Galton
    1:30-3:00 pm VCO-Based Delta Sigma ADCs Ian Galton
    3:30-5:00 pm Design of Building Blocks for CTDS Modulators Shanthi Pavan

    FRIDAY, March 30

    8:30-10:00 am Systematic Design Centering of a Practical CTDS Modulator Shanthi Pavan
    10:30-12:00 am Circuit Techniques to Mitigate Flicker
    Noise in CTDS Modulator
    Shanthi Pavan
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    Abstracts

    Delta-Sigma Data Converters
    March 26-30, 2018
    UC Santa Cruz, California, USA

    Delta Sigma Converter Basics, Parts A & B
    Shanthi Pavan, Indian Institute of Technology

    Review of quantization noise, oversampling and noise shaping. Signal dependent stability, fundamental tradeoffs in DS modulators – maximum stable amplitude and noise shaping.  Simulation techniques for Delta-Sigma Modulators.

    Delta Sigma Converter Basics, Parts C, D & E
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come

    High-Level Design of Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Systematic design of Continuous-Time Delta-Sigma Modulators from the DT prototype using z-transform and state space methods. The “method of moments” approach to design and intuitive understanding of Continuous-Time Delta-Sigma Modulators.

    Non-idealities in Continuous-Time Delta-Sigma Modulators
    Shanthi Pavan, Indian Institute of Technology

    Excess loop delay, and compensation techniques. Clock jitter and metastability. Clock jitter and metastability (contd). Mitigating effects of jitter in CTDSMs. Time constant variations. Loop filter nonlinearity.

    Discrete-Time Delta-Sigma Design
    David Johns, University of Toronto

    This talk will discuss the design of switched-capacitor delta sigma design. The basics of switched-capacitor circuits will be presented as well as circuit approaches to overcome limitations. In addition, the design of delta sigma converters using switched capacitor circuits will be discussed with the use of an example design.

    Introduction to the Delta-Sigma Toolbox
    David Johns, University of Toronto

    This talk will give an introduction to the use of a Matlab toolbox called the ³Delta Sigma Toolbox². Extensive examples will be given as well as how to make use of state-space to use different filter topologies as well as dynamic range scaling.

    Bandpass Delta-Sigma ADCs
    David Johns, University of Toronto

    This talk will discuss the design of Bandpass Delta Sigma ADCs which are useful in RF systems. Topics covered include resonator structures, architecture choices and
    example systems.

    Circuit Noise Issues with ADCs
    David Johns, University of Toronto

    This talk will discuss noise in basic circuits and opamps as well as a simple switched-C integrator as
    they apply to data converters. Topics covered include device noise basics, amplifier/cascode/mirror/diff-pair noise, switched-C noise, and oversampling.

    Dynamic Element Matching
    Ian Galton, UC San Diego

    This lecture will explain dynamic element matching (DEM) techniques in general and mismatch-noise shaping DEM in particular. Topics include qualitative and quantitative explanations of how error from component mismatches is spectrally shaped without knowledge of the mismatches, DEM DAC topologies and their limitations, DEM encoder algorithms and implementations, and the fundamental performance tradeoffs that govern all types of DEM.

    VCO-Based Delta-Sigma ADCs
    Ian Galton, UC San Diego

    Time-based signal processing is emerging as a viable alternative to analog signal processing traditionally performed in voltage, current, or charge domains. This tutorial discusses time-based techniques to implement high performance analog-to-digital converters.  Both open- and closed-loop noise shaping architectures using voltage controlled ring oscillators will be presented and their design tradeoffs will be elucidated with the aid of circuit design examples.

    Design of Building Blocks for CTDS Modulators
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    Systematic Design Centering of a Practical CTDS Modulator
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

    Circuit Techniques to Mitigate Flicker Noise in CTDS Modulators
    Shanthi Pavan, Indian Institute of Technology

    Abstract to come.

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  • Lausanne
  • TU DELFT The Netherland
  • UC Santa Cruz

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